Lines Matching +full:wait +full:- +full:on +full:- +full:read
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mach-omap2/sleep.S
7 * Richard Woodruff <r-woodruff2@ti.com>
26 * omap24xx_cpu_suspend() - Forces OMAP into deep sleep state by completing
27 * SDRC shutdown then ARM shutdown. Upon wake MPU is back on so just restore
31 * R0 : DLL ctrl value pre-Sleep
35 * The if the DPLL is going to AutoIdle. It seems like the DPLL may be back on
36 * when we get called, but the DLL probably isn't. We will wait a bit more in
37 * case the DPLL isn't quite there yet. The code will wait on DLL for DDR even
40 * For less than 242x-ES2.2 upon wake from a sleep mode where the external
41 * oscillator was stopped, a timing bug exists where a non-stabilized 12MHz
45 * CM_IDLEST_CLKGEN does not reflect the full clock change so you need to wait
53 stmfd sp!, {r0 - r12, lr} @ save registers on stack
58 ldr r4, [r2] @ read SDRC_POWER
59 orr r4, r4, #0x40 @ enable self refresh on idle req
63 mcr p15, 0, r3, c7, c0, 4 @ wait for interrupt
66 subs r5, r5, #0x1 @ awake, wait just a bit
69 /* The DPLL has to be on before we take the DDR out of self refresh */
73 ldr r4, [r4] @ read A_SDRC0
85 ldmfd sp!, {r0 - r12, pc} @ restore regs and return
91 .word . - omap24xx_cpu_suspend