Lines Matching +full:master +full:- +full:dsi
1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips
5 * Copyright (C) 2009-2011 Nokia Corporation
12 * XXX these should be marked initdata for multi-OMAP kernels
15 #include <linux/platform_data/i2c-omap.h>
17 #include <linux/platform_data/hsmmc-omap.h>
25 #include "prm-regbits-34xx.h"
26 #include "cm-regbits-34xx.h"
36 * is driver-specific or driver-kernel integration-specific belongs
286 * 32-bit watchdog upward counter that generates a pulse on the reset pin on
519 * 'dsi' class
535 .name = "dsi",
795 .rev_offs = -ENODEV,
901 .rev_offs = -ENODEV,
930 .rev_offs = -ENODEV,
942 .rev_offs = -ENODEV,
1027 * mailbox module allowing communication between the on-chip processors
1028 * using a queued mailbox-interrupt mechanism.
1061 * multichannel serial port interface (mcspi) / master/slave synchronous serial
1273 * high-speed multi-port usb host controller
1309 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
1314 * - USBHOST module is set to smart-idle mode
1315 * - PRCM asserts idle_req to the USBHOST module ( This typically
1317 * have been suspended, the master part of the USBHOST module has
1319 * - an USBHOST interrupt occurs before the module is able to answer
1329 * Errata: USB host EHCI may stall when entering smart-standby mode
1333 * When the USBHOST module is set to smart-standby mode, and when it is
1455 /* L3 -> L4_CORE interface */
1457 .master = &omap3xxx_l3_main_hwmod,
1462 /* L3 -> L4_PER interface */
1464 .master = &omap3xxx_l3_main_hwmod,
1470 /* MPU -> L3 interface */
1472 .master = &omap3xxx_mpu_hwmod,
1478 /* l3 -> debugss */
1480 .master = &omap3xxx_l3_main_hwmod,
1485 /* DSS -> l3 */
1487 .master = &omap3430es1_dss_core_hwmod,
1493 .master = &omap3xxx_dss_core_hwmod,
1504 /* l3_core -> sad2d interface */
1506 .master = &omap3xxx_sad2d_hwmod,
1512 /* L4_CORE -> L4_WKUP interface */
1514 .master = &omap3xxx_l4_core_hwmod,
1519 /* L4 CORE -> MMC1 interface */
1521 .master = &omap3xxx_l4_core_hwmod,
1529 .master = &omap3xxx_l4_core_hwmod,
1536 /* L4 CORE -> MMC2 interface */
1538 .master = &omap3xxx_l4_core_hwmod,
1546 .master = &omap3xxx_l4_core_hwmod,
1553 /* L4 CORE -> MMC3 interface */
1556 .master = &omap3xxx_l4_core_hwmod,
1563 /* L4 CORE -> UART1 interface */
1566 .master = &omap3xxx_l4_core_hwmod,
1572 /* L4 CORE -> UART2 interface */
1575 .master = &omap3xxx_l4_core_hwmod,
1581 /* L4 PER -> UART3 interface */
1584 .master = &omap3xxx_l4_per_hwmod,
1590 /* L4 PER -> UART4 interface */
1593 .master = &omap3xxx_l4_per_hwmod,
1599 /* AM35xx: L4 CORE -> UART4 interface */
1602 .master = &omap3xxx_l4_core_hwmod,
1608 /* L4 CORE -> I2C1 interface */
1610 .master = &omap3xxx_l4_core_hwmod,
1623 /* L4 CORE -> I2C2 interface */
1625 .master = &omap3xxx_l4_core_hwmod,
1638 /* L4 CORE -> I2C3 interface */
1641 .master = &omap3xxx_l4_core_hwmod,
1654 /* L4 CORE -> SR1 interface */
1656 .master = &omap3xxx_l4_core_hwmod,
1663 .master = &omap3xxx_l4_core_hwmod,
1669 /* L4 CORE -> SR2 interface */
1672 .master = &omap3xxx_l4_core_hwmod,
1679 .master = &omap3xxx_l4_core_hwmod,
1685 /* L4_WKUP -> L4_SEC interface */
1687 .master = &omap3xxx_l4_wkup_hwmod,
1692 /* IVA2 <- L3 interface */
1694 .master = &omap3xxx_l3_main_hwmod,
1700 /* l4_per -> timer3 */
1702 .master = &omap3xxx_l4_per_hwmod,
1709 /* l4_per -> timer4 */
1711 .master = &omap3xxx_l4_per_hwmod,
1718 /* l4_per -> timer5 */
1720 .master = &omap3xxx_l4_per_hwmod,
1727 /* l4_per -> timer6 */
1729 .master = &omap3xxx_l4_per_hwmod,
1736 /* l4_per -> timer7 */
1738 .master = &omap3xxx_l4_per_hwmod,
1745 /* l4_per -> timer8 */
1747 .master = &omap3xxx_l4_per_hwmod,
1754 /* l4_per -> timer9 */
1756 .master = &omap3xxx_l4_per_hwmod,
1762 /* l4_core -> timer10 */
1764 .master = &omap3xxx_l4_core_hwmod,
1770 /* l4_core -> timer11 */
1772 .master = &omap3xxx_l4_core_hwmod,
1778 /* l4_wkup -> wd_timer2 */
1781 .master = &omap3xxx_l4_wkup_hwmod,
1787 /* l4_core -> dss */
1789 .master = &omap3xxx_l4_core_hwmod,
1803 .master = &omap3xxx_l4_core_hwmod,
1816 /* l4_core -> dss_dispc */
1818 .master = &omap3xxx_l4_core_hwmod,
1831 /* l4_core -> dss_dsi1 */
1833 .master = &omap3xxx_l4_core_hwmod,
1846 /* l4_core -> dss_rfbi */
1848 .master = &omap3xxx_l4_core_hwmod,
1861 /* l4_core -> dss_venc */
1863 .master = &omap3xxx_l4_core_hwmod,
1877 /* l4_wkup -> gpio1 */
1880 .master = &omap3xxx_l4_wkup_hwmod,
1885 /* l4_per -> gpio2 */
1888 .master = &omap3xxx_l4_per_hwmod,
1893 /* l4_per -> gpio3 */
1896 .master = &omap3xxx_l4_per_hwmod,
1925 /* l4_core -> mmu isp */
1927 .master = &omap3xxx_l4_core_hwmod,
1947 /* l3_main -> iva mmu */
1949 .master = &omap3xxx_l3_main_hwmod,
1971 /* l4_per -> gpio4 */
1974 .master = &omap3xxx_l4_per_hwmod,
1979 /* l4_per -> gpio5 */
1982 .master = &omap3xxx_l4_per_hwmod,
1987 /* l4_per -> gpio6 */
1990 .master = &omap3xxx_l4_per_hwmod,
1995 /* l4_core -> mcbsp1 */
1997 .master = &omap3xxx_l4_core_hwmod,
2004 /* l4_per -> mcbsp2 */
2006 .master = &omap3xxx_l4_per_hwmod,
2013 /* l4_per -> mcbsp3 */
2015 .master = &omap3xxx_l4_per_hwmod,
2022 /* l4_per -> mcbsp4 */
2024 .master = &omap3xxx_l4_per_hwmod,
2031 /* l4_core -> mcbsp5 */
2033 .master = &omap3xxx_l4_core_hwmod,
2040 /* l4_per -> mcbsp2_sidetone */
2042 .master = &omap3xxx_l4_per_hwmod,
2049 /* l4_per -> mcbsp3_sidetone */
2051 .master = &omap3xxx_l4_per_hwmod,
2057 /* l4_core -> mailbox */
2059 .master = &omap3xxx_l4_core_hwmod,
2064 /* l4 core -> mcspi1 interface */
2066 .master = &omap3xxx_l4_core_hwmod,
2072 /* l4 core -> mcspi2 interface */
2074 .master = &omap3xxx_l4_core_hwmod,
2080 /* l4 core -> mcspi3 interface */
2082 .master = &omap3xxx_l4_core_hwmod,
2088 /* l4 core -> mcspi4 interface */
2091 .master = &omap3xxx_l4_core_hwmod,
2098 .master = &omap3xxx_usb_host_hs_hwmod,
2106 .master = &omap3xxx_l4_core_hwmod,
2114 .master = &omap3xxx_l4_core_hwmod,
2120 /* l4_core -> hdq1w interface */
2122 .master = &omap3xxx_l4_core_hwmod,
2143 * so is left as a future to-do item.
2146 .master = &am35xx_mdio_hwmod,
2152 /* l4_core -> davinci mdio */
2156 * so is left as a future to-do item.
2159 .master = &omap3xxx_l4_core_hwmod,
2175 * https://lore.kernel.org/all/1336770778-23044-3-git-send-email-mgreer@animalcreek.com/
2180 /* l3_core -> davinci emac interface */
2184 * so is left as a future to-do item.
2187 .master = &am35xx_emac_hwmod,
2193 /* l4_core -> davinci emac */
2197 * so is left as a future to-do item.
2200 .master = &omap3xxx_l4_core_hwmod,
2207 .master = &omap3xxx_l3_main_hwmod,
2213 /* l4_core -> SHAM2 (SHA1/MD5) (similar to omap24xx) */
2245 .master = &omap3xxx_l4_core_hwmod,
2253 * synchronous serial interface (multichannel and full-duplex serial if)
2285 /* L4 CORE -> SSI */
2287 .master = &omap3xxx_l4_core_hwmod,
2362 /* 3430ES1-only hwmod links */
2369 /* 3430ES2+-only hwmod links */
2379 /* <= 3430ES3-only hwmod links */
2386 /* 3430ES3+-only hwmod links */
2393 /* 34xx-only hwmod links (all ES revisions) */
2407 /* 36xx-only hwmod links (all ES revisions) */
2455 * omap3xxx_hwmod_is_hs_ip_block_usable - is a security IP block accessible?
2456 * @bus: struct device_node * for the top-level OMAP DT data
2463 * fused as a 'general-purpose' SoC. If however DT data is present,
2522 return -EINVAL; in omap3xxx_hwmod_init()
2585 * long-term fix to this is to ensure hwmods are set up in in omap3xxx_hwmod_init()