Lines Matching +full:0 +full:x44000000
17 #define L4_44XX_BASE 0x4a000000
18 #define L4_WK_44XX_BASE 0x4a300000
19 #define L4_PER_44XX_BASE 0x48000000
20 #define L4_EMU_44XX_BASE 0x54000000
21 #define L3_44XX_BASE 0x44000000
22 #define OMAP44XX_EMIF1_BASE 0x4c000000
23 #define OMAP44XX_EMIF2_BASE 0x4d000000
24 #define OMAP44XX_DMM_BASE 0x4e000000
25 #define OMAP4430_32KSYNCT_BASE 0x4a304000
26 #define OMAP4430_CM1_BASE 0x4a004000
28 #define OMAP4430_CM2_BASE 0x4a008000
29 #define OMAP4430_PRM_BASE 0x4a306000
30 #define OMAP4430_PRCM_MPU_BASE 0x48243000
31 #define OMAP44XX_GPMC_BASE 0x50000000
32 #define OMAP443X_SCM_BASE 0x4a002000
33 #define OMAP443X_CTRL_BASE 0x4a100000
34 #define OMAP44XX_IC_BASE 0x48200000
35 #define OMAP44XX_IVA_INTC_BASE 0x40000000
36 #define IRQ_SIR_IRQ 0x0040
37 #define OMAP44XX_GIC_DIST_BASE 0x48241000
38 #define OMAP44XX_GIC_CPU_BASE 0x48240100
40 #define OMAP44XX_LOCAL_TWD_BASE 0x48240600
41 #define OMAP44XX_L2CACHE_BASE 0x48242000
42 #define OMAP44XX_WKUPGEN_BASE 0x48281000
43 #define OMAP44XX_MCPDM_BASE 0x40132000
44 #define OMAP44XX_SAR_RAM_BASE 0x4a326000
46 #define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)
47 #define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000)
49 #define OMAP4_MMU1_BASE 0x55082000
50 #define OMAP4_MMU2_BASE 0x4A066000
52 #define OMAP44XX_USBTLL_BASE (L4_44XX_BASE + 0x62000)
53 #define OMAP44XX_UHH_CONFIG_BASE (L4_44XX_BASE + 0x64000)
54 #define OMAP44XX_HSUSB_OHCI_BASE (L4_44XX_BASE + 0x64800)
55 #define OMAP44XX_HSUSB_EHCI_BASE (L4_44XX_BASE + 0x64C00)