Lines Matching +full:enable +full:- +full:soft +full:- +full:reset

1 // SPDX-License-Identifier: GPL-2.0-only
3  * IP block integration code for the HDQ1W/1-wire IP block
8  * Based on the I2C reset code in arch/arm/mach-omap2/i2c.c by
26  * omap_hdq1w_reset - reset the OMAP HDQ1W module
29  * OCP soft reset the HDQ1W IP block.  Section 20.6.1.4 "HDQ1W/1-Wire
30  * Software Reset" of the OMAP34xx Technical Reference Manual Revision
32  * the reset to succeed, the HDQ1W module's internal clock gate must be
34  * module.  In this sense, it's rather similar to the I2C custom reset
45 	/* Enable the module's internal clocks */  in omap_hdq1w_reset()
52 					   oh->class->sysc->syss_offs)  in omap_hdq1w_reset()
58 			__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);  in omap_hdq1w_reset()
61 			 oh->name, c);  in omap_hdq1w_reset()