Lines Matching +full:32 +full:khz
4 * OMAP 32K Timer
59 * 32KHz OS timer
62 * 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track
63 * of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer
65 * with the 32KHz synchronized timer.
129 .name = "32k-timer",
152 IRQF_TIMER | IRQF_IRQPOLL, "32KHz timer", NULL)) in omap_init_32k_timer()
153 pr_err("Failed to request irq %d(32KHz timer)\n", INT_OS_TIMER); in omap_init_32k_timer()
160 /* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
167 * 32KHz clocksource ... always available, on pretty most chips except
188 * 32k sync timer. Convert the cycles elapsed since last read into
208 * omap_init_clocksource_32k - setup and register counter 32k as a
220 * 32k sync Counter IP register offsets vary between the in omap_init_clocksource_32k()
238 ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768, in omap_init_clocksource_32k()
239 250, 32, clocksource_mmio_readl_up); in omap_init_clocksource_32k()
241 pr_err("32k_counter: can't register clocksource\n"); in omap_init_clocksource_32k()
245 sched_clock_register(omap_32k_read_sched_clock, 32, 32768); in omap_init_clocksource_32k()
247 pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n"); in omap_init_clocksource_32k()
267 pr_err("32k_counter: failed to map base addr\n"); in omap_32k_timer_init()