2  * linux/arch/arm/mach-omap1/pm.c
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38 #include <linux/suspend.h>
55 #include <linux/soc/ti/omap1-io.h>
57 #include <linux/omap-dma.h>
58 #include <clocksource/timer-ti-dm.h>
91 		return -EINVAL;  in idle_store()
107  * a clock tick interrupt . .
163 	 * Turn off all interrupts except GPIO bank 1, L1-2nd level cascade,  in omap_pm_wakeup_setup()
191 	/*  New IRQ agreement, recalculate in cascade order */  in omap_pm_wakeup_setup()
263 	/* (Step 3 removed - we now allow deep sleep by default) */  in omap1_pm_suspend()
302 	 * assembly code in internal SRAM.  in omap1_pm_suspend()
375 	 * Re-enable interrupts  in omap1_pm_suspend()
383 	printk(KERN_INFO "PM: OMAP%x is re-starting from deep sleep...\n",  in omap1_pm_suspend()
427 		   "ARM_CKCTL_REG:            0x%-8x     \n"  in omap_pm_debug_show()
428 		   "ARM_IDLECT1_REG:          0x%-8x     \n"  in omap_pm_debug_show()
429 		   "ARM_IDLECT2_REG:          0x%-8x     \n"  in omap_pm_debug_show()
430 		   "ARM_IDLECT3_REG:	      0x%-8x     \n"  in omap_pm_debug_show()
431 		   "ARM_EWUPCT_REG:           0x%-8x     \n"  in omap_pm_debug_show()
432 		   "ARM_RSTCT1_REG:           0x%-8x     \n"  in omap_pm_debug_show()
433 		   "ARM_RSTCT2_REG:           0x%-8x     \n"  in omap_pm_debug_show()
434 		   "ARM_SYSST_REG:            0x%-8x     \n"  in omap_pm_debug_show()
435 		   "ULPD_IT_STATUS_REG:       0x%-4x     \n"  in omap_pm_debug_show()
436 		   "ULPD_CLOCK_CTRL_REG:      0x%-4x     \n"  in omap_pm_debug_show()
437 		   "ULPD_SOFT_REQ_REG:        0x%-4x     \n"  in omap_pm_debug_show()
438 		   "ULPD_DPLL_CTRL_REG:       0x%-4x     \n"  in omap_pm_debug_show()
439 		   "ULPD_STATUS_REQ_REG:      0x%-4x     \n"  in omap_pm_debug_show()
440 		   "ULPD_POWER_CTRL_REG:      0x%-4x     \n",  in omap_pm_debug_show()
458 			   "MPUI1510_CTRL_REG             0x%-8x \n"  in omap_pm_debug_show()
459 			   "MPUI1510_DSP_STATUS_REG:      0x%-8x \n"  in omap_pm_debug_show()
460 			   "MPUI1510_DSP_BOOT_CONFIG_REG: 0x%-8x \n"  in omap_pm_debug_show()
461 			   "MPUI1510_DSP_API_CONFIG_REG:  0x%-8x \n"  in omap_pm_debug_show()
462 			   "MPUI1510_SDRAM_CONFIG_REG:    0x%-8x \n"  in omap_pm_debug_show()
463 			   "MPUI1510_EMIFS_CONFIG_REG:    0x%-8x \n",  in omap_pm_debug_show()
472 			   "MPUI1610_CTRL_REG             0x%-8x \n"  in omap_pm_debug_show()
473 			   "MPUI1610_DSP_STATUS_REG:      0x%-8x \n"  in omap_pm_debug_show()
474 			   "MPUI1610_DSP_BOOT_CONFIG_REG: 0x%-8x \n"  in omap_pm_debug_show()
475 			   "MPUI1610_DSP_API_CONFIG_REG:  0x%-8x \n"  in omap_pm_debug_show()
476 			   "MPUI1610_SDRAM_CONFIG_REG:    0x%-8x \n"  in omap_pm_debug_show()
477 			   "MPUI1610_EMIFS_CONFIG_REG:    0x%-8x \n",  in omap_pm_debug_show()
503  *	omap_pm_prepare - Do preliminary suspend work.
508 	/* We cannot sleep in idle until we have resumed */  in omap_pm_prepare()
515  *	omap_pm_enter - Actually enter a sleep state.
528 		return -EINVAL;  in omap_pm_enter()
536  *	omap_pm_finish - Finish up suspend sequence.
568 		return -ENODEV;  in omap_pm_init()
573 		pr_info("OMAP1 PM: sleep states in idle disabled due to no 32KiHz timer\n");  in omap_pm_init()
576 		pr_info("OMAP1 PM: sleep states in idle disabled due to no DMTIMER support\n");  in omap_pm_init()
581 		pr_info("OMAP1 PM: sleep states in idle enabled\n");  in omap_pm_init()
587 	 * These routines need to be in SRAM as that's the only  in omap_pm_init()
600 		return -ENODEV;  in omap_pm_init()
608 		irq = -1;  in omap_pm_init()
615 	/* Program new power ramp-up time  in omap_pm_init()
616 	 * (0 for most boards since we don't lower voltage when in deep sleep)  in omap_pm_init()
620 	/* Setup ULPD POWER_CTRL_REG - enter deep sleep whenever possible */  in omap_pm_init()