1 // SPDX-License-Identifier: GPL-2.0-or-later
23 #define MESON_SMP_SRAM_CPU_CTRL_ADDR_REG(c)	(0x04 + ((c - 1) << 2))
31 #define MESON_CPU_PWR_A9_MEM_PD0_M(c)		(0x0f << (32 - (c * 4)))
36 static struct regmap *pmu;  variable
66 	/* SMP SRAM */  in meson_smp_prepare_cpus()
69 		pr_err("Missing SRAM node\n");  in meson_smp_prepare_cpus()
76 		pr_err("Couldn't map SRAM registers\n");  in meson_smp_prepare_cpus()
80 	/* PMU */  in meson_smp_prepare_cpus()
81 	pmu = syscon_regmap_lookup_by_compatible(pmu_compatible);  in meson_smp_prepare_cpus()
82 	if (IS_ERR(pmu)) {  in meson_smp_prepare_cpus()
83 		pr_err("Couldn't map PMU registers\n");  in meson_smp_prepare_cpus()
106 	meson_smp_prepare_cpus("arm,cortex-a5-scu", "amlogic,meson8b-pmu",  in meson8b_smp_prepare_cpus()
107 			       "amlogic,meson8b-smp-sram");  in meson8b_smp_prepare_cpus()
112 	meson_smp_prepare_cpus("arm,cortex-a9-scu", "amlogic,meson8-pmu",  in meson8_smp_prepare_cpus()
113 			       "amlogic,meson8-smp-sram");  in meson8_smp_prepare_cpus()
121 	 * system without power-cycling, or when taking the CPU offline and  in meson_smp_begin_secondary_boot()
143 			return -ETIMEDOUT;  in meson_smp_finalize_secondary_boot()
177 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL1,  in meson8_smp_boot_secondary()
187 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8_smp_boot_secondary()
197 		pr_err("Failed to de-assert CPU%d reset\n", cpu);  in meson8_smp_boot_secondary()
227 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0,  in meson8b_smp_boot_secondary()
244 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_MEM_PD0,  in meson8b_smp_boot_secondary()
252 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL1,  in meson8b_smp_boot_secondary()
261 	ret = regmap_read_poll_timeout(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL1, val,  in meson8b_smp_boot_secondary()
265 		pr_err("Timeout while polling PMU for CPU%d status\n", cpu);  in meson8b_smp_boot_secondary()
270 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8b_smp_boot_secondary()
280 		pr_err("Failed to de-assert CPU%d reset\n", cpu);  in meson8b_smp_boot_secondary()
326 		pr_err("Error while waiting for SCU power-off on CPU%d\n",  in meson8_smp_cpu_kill()
328 		return -ETIMEDOUT;  in meson8_smp_cpu_kill()
334 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8_smp_cpu_kill()
344 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL1,  in meson8_smp_cpu_kill()
368 		pr_err("Error while waiting for SCU power-off on CPU%d\n",  in meson8b_smp_cpu_kill()
370 		return -ETIMEDOUT;  in meson8b_smp_cpu_kill()
376 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0,  in meson8b_smp_cpu_kill()
384 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8b_smp_cpu_kill()
394 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL1,  in meson8b_smp_cpu_kill()
402 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_MEM_PD0,  in meson8b_smp_cpu_kill()
431 CPU_METHOD_OF_DECLARE(meson8_smp, "amlogic,meson8-smp", &meson8_smp_ops);
432 CPU_METHOD_OF_DECLARE(meson8b_smp, "amlogic,meson8b-smp", &meson8b_smp_ops);