Lines Matching refs:str
79 str r7, [pmc, #AT91_PMC_SCDR]
109 str r9, [r7, #AT91_SFRBU_25LDOCR]
139 str tmp1, [r2, #UDDRC_PCTRL_0]
143 str tmp1, [r2, #UDDRC_PCTRL_1]
147 str tmp1, [r2, #UDDRC_PCTRL_2]
151 str tmp1, [r2, #UDDRC_PCTRL_3]
155 str tmp1, [r2, #UDDRC_PCTRL_4]
167 str tmp1, [r2, #UDDRC_PWRCTL]
183 str tmp1, [r3, DDR3PHY_ACDLLCR]
188 str tmp1, [r3, #DDR3PHY_DX0DLLCR]
192 str tmp1, [r3, #DDR3PHY_DX1DLLCR]
198 str tmp1, [r3, #DDR3PHY_DXCCR]
205 str tmp1, [r3, #DDR3PHY_ACIOCR]
210 str tmp1, [r3, #DDR3PHY_DSGCR]
225 str tmp1, [r3, #DDR3PHY_DXCCR]
232 str tmp1, [r3, #DDR3PHY_ACIOCR]
237 str tmp1, [r3, #DDR3PHY_DSGCR]
242 str tmp1, [r3, #DDR3PHY_DX0DLLCR]
246 str tmp1, [r3, #DDR3PHY_DX1DLLCR]
250 str tmp1, [r2, #UDDRC_SWCTRL]
255 str tmp1, [r2, #UDDRC_DFIMISC]
259 str tmp1, [r2, #UDDRC_SWCTRL]
269 str tmp1, [r3, #DDR3PHY_PIR]
279 str tmp1, [r2, #UDDRC_SWCTRL]
284 str tmp1, [r2, #UDDRC_DFIMISC]
288 str tmp1, [r2, #UDDRC_SWCTRL]
299 str tmp1, [r2, #UDDRC_PWRCTL]
311 str tmp1, [r2, #UDDRC_PCTRL_0]
315 str tmp1, [r2, #UDDRC_PCTRL_1]
319 str tmp1, [r2, #UDDRC_PCTRL_2]
323 str tmp1, [r2, #UDDRC_PCTRL_3]
327 str tmp1, [r2, #UDDRC_PCTRL_4]
349 str r3, [r2, #AT91_MC_SDRAMC_SRR]
362 str r3, .saved_sam9_mdr
372 str r3, .saved_sam9_lpr
375 str r3, [r2, #AT91_DDRSDRC_LPR]
383 str r3, .saved_sam9_mdr1
393 str r3, .saved_sam9_lpr1
396 str r3, [r2, #AT91_DDRSDRC_LPR]
407 str r3, .saved_sam9_lpr
410 str r3, [r2, #AT91_SDRAMC_LPR]
413 str r3, [r2, #AT91_SDRAMC_LPR]
451 str r3, [r2, #AT91_DDRSDRC_MDR]
454 str r3, [r2, #AT91_DDRSDRC_LPR]
469 str r3, [r2, #AT91_SDRAMC_LPR]
488 str tmp1, [pmc, tmp3]
499 str tmp1, [pmc, #AT91_CKGR_MOR]
503 str tmp1, .saved_osc_status
512 str tmp1, [pmc, #AT91_CKGR_MOR]
530 str tmp1, [pmc, tmp3]
546 str tmp1, [pmc, #AT91_CKGR_MOR]
557 str tmp1, [pmc, #AT91_CKGR_MOR]
574 str tmp1, .saved_osc_status
583 str tmp1, [pmc, #AT91_CKGR_MOR]
595 str tmp1, [pmc, #AT91_CKGR_MOR]
604 str tmp1, [pmc, #AT91_CKGR_MOR]
610 str tmp1, [pmc, tmp2]
619 str tmp1, [pmc, #AT91_CKGR_MOR]
632 str tmp1, [pmc, #AT91_CKGR_MOR]
639 str tmp1, [pmc, tmp2]
648 str tmp1, [pmc, #AT91_CKGR_MOR]
656 str tmp1, [pmc, tmp2]
670 str tmp1, [pmc, #AT91_CKGR_MOR]
690 str tmp2, [pmc, #AT91_PMC_PLL_UPDT]
702 str tmp1, .saved_pllar
708 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
714 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
720 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
725 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
731 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
738 str tmp1, .saved_pllar
743 str tmp1, [pmc, #AT91_CKGR_PLLAR]
758 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
762 str tmp1, [pmc, #AT91_PMC_PLL_ACR]
769 str tmp1, [pmc, #AT91_PMC_PLL_CTRL1]
775 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
786 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
792 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
802 4: str tmp2, [pmc, #AT91_CKGR_PLLAR]
831 str tmp1, [pmc, #AT91_PMC_MCR_V2]
837 str tmp2, .saved_mck1
843 str tmp2, .saved_mck2
849 str tmp2, .saved_mck3
853 str tmp2, .saved_mck4
861 str tmp2, [pmc, #AT91_PMC_MCR_V2]
909 str tmp1, [pmc, #AT91_PMC_MCR_V2]
919 str tmp2, [pmc, #AT91_PMC_MCR_V2]
938 str tmp1, .saved_mckr
950 str tmp1, [pmc, tmp2]
984 str tmp2, [pmc, tmp1]
998 str tmp1, [pmc, tmp2]
1006 str tmp1, [r0, #0x10]
1018 str tmp1, [r0, #0]
1041 str tmp1, .mckr_offset
1043 str tmp1, .pmc_version
1045 str tmp1, .memtype
1047 str tmp1, .pm_mode
1054 str tmp1, .pmc_base
1059 str tmp1, .sramc_base
1064 str tmp1, .sramc1_base
1071 str tmp1, .sramc_phy_base
1076 str tmp1, .shdwc
1081 str tmp1, .sfrbu