Lines Matching +full:self +full:- +full:refresh
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-at91/pm_slow_clock.S
13 #include "pm_data-offsets.h"
16 .arch armv7-a
102 * Enable self-refresh
141 /* Switch to self-refresh. */
147 /* Wait for self-refresh enter. */
153 /* Disable DX DLLs for non-backup modes. */
191 * Disable self-refresh
225 /* Enable quasi-dynamic programming. */
229 /* De-assert SDRAM initialization. */
234 /* Quasi-dynamic programming done. */
243 /* DLL soft-reset + DLL lock wait + ITM reset */
254 /* Enable quasi-dynamic programming. */
273 /* Trigger self-refresh exit. */
279 /* Wait for self-refresh exit done. */
310 * Enable self-refresh
324 /* Active SDRAM self-refresh mode */
337 /* LPDDR1 --> force DDR2 mode during self-refresh */
347 /* Active DDRC self-refresh mode */
368 /* Active DDRC self-refresh mode */
382 /* Active SDRAMC self-refresh mode */
396 * Disable self-refresh
415 * For exiting the self-refresh mode, do nothing,
416 * automatically exit the self-refresh mode.
567 /* Switch the main clock source to 12-MHz RC oscillator */
988 * - MAINCK if using ULP0 fast variant
989 * - slow clock, otherwise
1066 /* at91_pm_suspend_in_sram must be 8-byte aligned per the requirements of fncpy() */
1070 stmfd sp!, {r4 - r12, lr}
1095 * to RAM may be limited while in self-refresh.
1130 /* Active the self-refresh mode */
1152 /* Exit the self-refresh mode */
1156 ldmfd sp!, {r4 - r12, pc}
1221 .word .-at91_pm_suspend_in_sram