1 // SPDX-License-Identifier: GPL-2.0
5  *  PCI bios-type initialisation for PCI machines
16 #include <asm/mach-types.h>
30 	list_for_each_entry(dev, &bus->devices, bus_list) {  in pcibios_bus_report_status()
34 		 * ignore host bridge - we handle  in pcibios_bus_report_status()
37 		if (dev->bus->number == 0 && dev->devfn == 0)  in pcibios_bus_report_status()
54 	list_for_each_entry(dev, &bus->devices, bus_list)  in pcibios_bus_report_status()
55 		if (dev->subordinate)  in pcibios_bus_report_status()
56 			pcibios_bus_report_status(dev->subordinate, status_mask, warn);  in pcibios_bus_report_status()
73  * 2. ISA bridge ping-pong
87 	dev->resource[0].end -= dev->resource[0].start;  in pci_fixup_83c553()
88 	dev->resource[0].start = 0;  in pci_fixup_83c553()
96 	 * Enable ping-pong on bus master to ISA bridge transactions.  in pci_fixup_83c553()
97 	 * This improves the sound DMA substantially.  The fixed  in pci_fixup_83c553()
123 	 * Route INTA input to IRQ 11, and set IRQ11 to be level  in pci_fixup_83c553()
133 	dev->resource[0].end -= dev->resource[0].start;  in pci_fixup_unassign()
134 	dev->resource[0].start = 0;  in pci_fixup_unassign()
145 	if (dev->devfn == 0) {  in pci_fixup_dec21285()
148 		dev->class &= 0xff;  in pci_fixup_dec21285()
149 		dev->class |= PCI_CLASS_BRIDGE_HOST << 8;  in pci_fixup_dec21285()
151 			r->start = 0;  in pci_fixup_dec21285()
152 			r->end = 0;  in pci_fixup_dec21285()
153 			r->flags = 0;  in pci_fixup_dec21285()
160  * PCI IDE controllers use non-standard I/O port decoding, respect it.
166 	if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE)  in pci_fixup_ide_bases()
170 		if ((r->start & ~0x80) == 0x374) {  in pci_fixup_ide_bases()
171 			r->start |= 2;  in pci_fixup_ide_bases()
172 			r->end = r->start;  in pci_fixup_ide_bases()
194  * our own auto-configuration on them.
205 	if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) {  in pci_fixup_cy82c693()
208 		if (dev->class & 0x80) {	/* primary */  in pci_fixup_cy82c693()
221 		dev->resource[0].start = 0;  in pci_fixup_cy82c693()
222 		dev->resource[0].end   = 0;  in pci_fixup_cy82c693()
223 		dev->resource[0].flags = 0;  in pci_fixup_cy82c693()
225 		dev->resource[1].start = 0;  in pci_fixup_cy82c693()
226 		dev->resource[1].end   = 0;  in pci_fixup_cy82c693()
227 		dev->resource[1].flags = 0;  in pci_fixup_cy82c693()
228 	} else if (PCI_FUNC(dev->devfn) == 0) {  in pci_fixup_cy82c693()
241 		 * Enable PCI retry, and PCI post-write buffer.  in pci_fixup_cy82c693()
259 	return ((dev->vendor == PCI_VENDOR_ID_INTERG &&  in pdev_bad_for_parity()
260 		 (dev->device == PCI_DEVICE_ID_INTERG_2000 ||  in pdev_bad_for_parity()
261 		  dev->device == PCI_DEVICE_ID_INTERG_2010)) ||  in pdev_bad_for_parity()
262 		(dev->vendor == PCI_VENDOR_ID_ITE &&  in pdev_bad_for_parity()
263 		 dev->device == PCI_DEVICE_ID_ITE_8152));  in pdev_bad_for_parity()
268  * pcibios_fixup_bus - Called after each bus is probed,
280 	list_for_each_entry(dev, &bus->devices, bus_list) {  in pcibios_fixup_bus()
297 		switch (dev->class >> 8) {  in pcibios_fixup_bus()
316 	list_for_each_entry(dev, &bus->devices, bus_list) {  in pcibios_fixup_bus()
330 	if (bus->self && bus->self->hdr_type == PCI_HEADER_TYPE_BRIDGE) {  in pcibios_fixup_bus()
332 			bus->bridge_ctl |= PCI_BRIDGE_CTL_FAST_BACK;  in pcibios_fixup_bus()
334 			bus->bridge_ctl |= PCI_BRIDGE_CTL_PARITY;  in pcibios_fixup_bus()
341 		bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis");  in pcibios_fixup_bus()
346  * Swizzle the device pin each time we cross a bridge.  If a platform does
349  * The default swizzling walks up the bus tree one level at a time, applying
352  * root bus and the interrupt pin on that device which should correspond
355  * Platforms may override this, in which case the slot and pin returned
357  * PCI standard swizzle is implemented on plug-in cards and Cardbus based
360 static u8 pcibios_swizzle(struct pci_dev *dev, u8 *pin)  in pcibios_swizzle()  argument
362 	struct pci_sys_data *sys = dev->sysdata;  in pcibios_swizzle()
363 	int slot, oldpin = *pin;  in pcibios_swizzle()
365 	if (sys->swizzle)  in pcibios_swizzle()
366 		slot = sys->swizzle(dev, pin);  in pcibios_swizzle()
368 		slot = pci_common_swizzle(dev, pin);  in pcibios_swizzle()
371 		printk("PCI: %s swizzling pin %d => pin %d slot %d\n",  in pcibios_swizzle()
372 			pci_name(dev), oldpin, *pin, slot);  in pcibios_swizzle()
378  * Map a slot/pin to an IRQ.
380 static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)  in pcibios_map_irq()  argument
382 	struct pci_sys_data *sys = dev->sysdata;  in pcibios_map_irq()
383 	int irq = -1;  in pcibios_map_irq()
385 	if (sys->map_irq)  in pcibios_map_irq()
386 		irq = sys->map_irq(dev, slot, pin);  in pcibios_map_irq()
389 		printk("PCI: %s mapping slot %d pin %d => irq %d\n",  in pcibios_map_irq()
390 			pci_name(dev), slot, pin, irq);  in pcibios_map_irq()
400 	if (list_empty(&sys->resources)) {  in pcibios_init_resource()
401 		pci_add_resource_offset(&sys->resources,  in pcibios_init_resource()
402 			 &iomem_resource, sys->mem_offset);  in pcibios_init_resource()
405 	resource_list_for_each_entry(window, &sys->resources)  in pcibios_init_resource()
406 		if (resource_type(window->res) == IORESOURCE_IO)  in pcibios_init_resource()
409 	sys->io_res.start = (busnr * SZ_64K) ?  : pcibios_min_io;  in pcibios_init_resource()
410 	sys->io_res.end = (busnr + 1) * SZ_64K - 1;  in pcibios_init_resource()
411 	sys->io_res.flags = IORESOURCE_IO;  in pcibios_init_resource()
412 	sys->io_res.name = sys->io_res_name;  in pcibios_init_resource()
413 	sprintf(sys->io_res_name, "PCI%d I/O", busnr);  in pcibios_init_resource()
415 	ret = request_resource(&ioport_resource, &sys->io_res);  in pcibios_init_resource()
420 	pci_add_resource_offset(&sys->resources, &sys->io_res,  in pcibios_init_resource()
421 				sys->io_offset);  in pcibios_init_resource()
433 	for (nr = busnr = 0; nr < hw->nr_controllers; nr++) {  in pcibios_init_hw()
442 		sys->busnr   = busnr;  in pcibios_init_hw()
443 		sys->swizzle = hw->swizzle;  in pcibios_init_hw()
444 		sys->map_irq = hw->map_irq;  in pcibios_init_hw()
445 		INIT_LIST_HEAD(&sys->resources);  in pcibios_init_hw()
447 		if (hw->private_data)  in pcibios_init_hw()
448 			sys->private_data = hw->private_data[nr];  in pcibios_init_hw()
450 		ret = hw->setup(nr, sys);  in pcibios_init_hw()
460 			bridge->map_irq = pcibios_map_irq;  in pcibios_init_hw()
461 			bridge->swizzle_irq = pcibios_swizzle;  in pcibios_init_hw()
463 			if (hw->scan)  in pcibios_init_hw()
464 				ret = hw->scan(nr, bridge);  in pcibios_init_hw()
466 				list_splice_init(&sys->resources,  in pcibios_init_hw()
467 						 &bridge->windows);  in pcibios_init_hw()
468 				bridge->dev.parent = parent;  in pcibios_init_hw()
469 				bridge->sysdata = sys;  in pcibios_init_hw()
470 				bridge->busnr = sys->busnr;  in pcibios_init_hw()
471 				bridge->ops = hw->ops;  in pcibios_init_hw()
481 			sys->bus = bridge->bus;  in pcibios_init_hw()
483 			busnr = sys->bus->busn_res.end + 1;  in pcibios_init_hw()
485 			list_add(&sys->node, head);  in pcibios_init_hw()
500 	if (hw->preinit)  in pci_common_init_dev()
501 		hw->preinit();  in pci_common_init_dev()
503 	if (hw->postinit)  in pci_common_init_dev()
504 		hw->postinit();  in pci_common_init_dev()
507 		struct pci_bus *bus = sys->bus;  in pci_common_init_dev()
522 			list_for_each_entry(child, &bus->children, node)  in pci_common_init_dev()
547  * From arch/i386/kernel/pci-i386.c:
551  * addresses to be allocated in the 0x000-0x0ff region
555  * the low 10 bits of the IO address. The 0x00-0xff region
557  * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
558  * but we want to try to avoid allocating at 0x2900-0x2bff
559  * which might be mirrored at 0x0100-0x03ff..
565 	resource_size_t start = res->start;  in pcibios_align_resource()
568 	if (res->flags & IORESOURCE_IO && start & 0x300)  in pcibios_align_resource()
571 	start = (start + align - 1) & ~(align - 1);  in pcibios_align_resource()
573 	host_bridge = pci_find_host_bridge(dev->bus);  in pcibios_align_resource()
575 	if (host_bridge->align_resource)  in pcibios_align_resource()
576 		return host_bridge->align_resource(dev, res,  in pcibios_align_resource()