Lines Matching refs:ldr
47 ldr rp, =TEGRA_CLK_RST_DEVICES_##lhu ; \
49 ldr rp, [rp, #0] ; \
55 ldr rp, =TEGRA_CLK_OUT_ENB_##lhu ; \
57 ldr rp, [rp, #0] ; \
63 ldr rp, =TEGRA_UART##uart##_BASE ; \
69 ldr \rv, [\rp] @ linked addr is stored there
71 ldr \rp, [\rp, #4] @ linked tegra_uart_config
73 ldr \rp, [\tmp] @ Load tegra_uart_config
81 10: ldr \rp, =TEGRA_PMC_SCRATCH20
82 ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
183 100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys
184 ldr \rv, [\tmp, #8] @ Load tegra_uart_virt