321 	tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);  in __local_flush_tlb_all()
322 	tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);  in __local_flush_tlb_all()
323 	tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);  in __local_flush_tlb_all()
335 	tlb_op(TLB_V7_UIS_FULL, "c8, c7, 0", zero);  in local_flush_tlb_all()
352 	tlb_op(TLB_V7_UIS_FULL, "c8, c3, 0", zero);  in __flush_tlb_all()
368 			tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);  in __local_flush_tlb_mm()
369 			tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);  in __local_flush_tlb_mm()
370 			tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);  in __local_flush_tlb_mm()
374 	tlb_op(TLB_V6_U_ASID, "c8, c7, 2", asid);  in __local_flush_tlb_mm()
375 	tlb_op(TLB_V6_D_ASID, "c8, c6, 2", asid);  in __local_flush_tlb_mm()
376 	tlb_op(TLB_V6_I_ASID, "c8, c5, 2", asid);  in __local_flush_tlb_mm()
388 	tlb_op(TLB_V7_UIS_ASID, "c8, c7, 2", asid);  in local_flush_tlb_mm()
403 	tlb_op(TLB_V7_UIS_ASID, "c8, c3, 0", 0);  in __flush_tlb_mm()
405 	tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm));  in __flush_tlb_mm()
422 		tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);  in __local_flush_tlb_page()
423 		tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);  in __local_flush_tlb_page()
424 		tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);  in __local_flush_tlb_page()
426 			asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");  in __local_flush_tlb_page()
429 	tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", uaddr);  in __local_flush_tlb_page()
430 	tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", uaddr);  in __local_flush_tlb_page()
431 	tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", uaddr);  in __local_flush_tlb_page()
445 	tlb_op(TLB_V7_UIS_PAGE, "c8, c7, 1", uaddr);  in local_flush_tlb_page()
463 	tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 3", uaddr & PAGE_MASK);  in __flush_tlb_page()
465 	tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", uaddr);  in __flush_tlb_page()
477 	tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);  in __local_flush_tlb_kernel_page()
478 	tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);  in __local_flush_tlb_kernel_page()
479 	tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);  in __local_flush_tlb_kernel_page()
481 		asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");  in __local_flush_tlb_kernel_page()
483 	tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", kaddr);  in __local_flush_tlb_kernel_page()
484 	tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", kaddr);  in __local_flush_tlb_kernel_page()
485 	tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", kaddr);  in __local_flush_tlb_kernel_page()
498 	tlb_op(TLB_V7_UIS_PAGE, "c8, c7, 1", kaddr);  in local_flush_tlb_kernel_page()
516 	tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", kaddr);  in __flush_tlb_kernel_page()