Lines Matching +full:zynq +full:- +full:gpio +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
30 stdout-path = "serial0:115200n8";
34 compatible = "usb-nop-xceiv";
35 #phy-cells = <0>;
40 ps-clk-frequency = <33333333>;
45 phy-mode = "rgmii-id";
46 phy-handle = <ðernet_phy>;
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_gem0_default>;
50 ethernet_phy: ethernet-phy@7 {
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_gpio0_default>;
62 clock-frequency = <400000>;
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_i2c0_default>;
66 i2c-mux@74 {
68 #address-cells = <1>;
69 #size-cells = <0>;
73 #address-cells = <1>;
74 #size-cells = <0>;
76 si570: clock-generator@5d {
77 #clock-cells = <0>;
79 temperature-stability = <50>;
81 factory-fout = <156250000>;
82 clock-frequency = <148500000>;
86 i2c@1 {
87 #address-cells = <1>;
88 #size-cells = <0>;
89 reg = <1>;
90 adv7511: hdmi-tx@39 {
93 adi,input-depth = <8>;
94 adi,input-colorspace = "yuv422";
95 adi,input-clock = "1x";
96 adi,input-style = <3>;
97 adi,input-justification = "evenly";
102 #address-cells = <1>;
103 #size-cells = <0>;
112 #address-cells = <1>;
113 #size-cells = <0>;
115 gpio@21 {
118 gpio-controller;
119 #gpio-cells = <2>;
124 #address-cells = <1>;
125 #size-cells = <0>;
134 #address-cells = <1>;
135 #size-cells = <0>;
146 pinctrl_gem0_default: gem0-default {
154 slew-rate = <0>;
155 power-source = <4>;
158 conf-rx {
160 bias-high-impedance;
161 low-power-disable;
164 conf-tx {
166 low-power-enable;
167 bias-disable;
170 mux-mdio {
175 conf-mdio {
177 slew-rate = <0>;
178 power-source = <1>;
179 bias-disable;
183 pinctrl_gpio0_default: gpio0-default {
191 slew-rate = <0>;
192 power-source = <1>;
195 conf-pull-up {
197 bias-pull-up;
200 conf-pull-none {
202 bias-disable;
206 pinctrl_i2c0_default: i2c0-default {
214 bias-pull-up;
215 slew-rate = <0>;
216 power-source = <1>;
220 pinctrl_sdhci0_default: sdhci0-default {
228 slew-rate = <0>;
229 power-source = <1>;
230 bias-disable;
233 mux-cd {
238 conf-cd {
240 bias-high-impedance;
241 bias-pull-up;
242 slew-rate = <0>;
243 power-source = <1>;
246 mux-wp {
251 conf-wp {
253 bias-high-impedance;
254 bias-pull-up;
255 slew-rate = <0>;
256 power-source = <1>;
260 pinctrl_uart1_default: uart1-default {
268 slew-rate = <0>;
269 power-source = <1>;
272 conf-rx {
274 bias-high-impedance;
277 conf-tx {
279 bias-disable;
283 pinctrl_usb0_default: usb0-default {
291 slew-rate = <0>;
292 power-source = <1>;
295 conf-rx {
297 bias-high-impedance;
300 conf-tx {
303 bias-disable;
309 bootph-all;
311 num-cs = <2>;
313 compatible = "jedec,spi-nor";
314 reg = <0>, <1>;
315 parallel-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */
316 spi-tx-bus-width = <1>;
317 spi-rx-bus-width = <4>;
318 spi-max-frequency = <50000000>;
320 compatible = "fixed-partitions";
321 #address-cells = <1>;
322 #size-cells = <1>;
324 label = "qspi-fsbl-uboot";
328 label = "qspi-linux";
332 label = "qspi-device-tree";
336 label = "qspi-rootfs";
340 label = "qspi-bitstream";
348 bootph-all;
350 pinctrl-names = "default";
351 pinctrl-0 = <&pinctrl_sdhci0_default>;
355 bootph-all;
357 pinctrl-names = "default";
358 pinctrl-0 = <&pinctrl_uart1_default>;
364 usb-phy = <&usb_phy0>;
365 pinctrl-names = "default";
366 pinctrl-0 = <&pinctrl_usb0_default>;