Lines Matching +full:pinctrl +full:- +full:zynq
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 /include/ "zynq-7000.dtsi"
11 compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
26 stdout-path = "serial0:115200n8";
30 compatible = "usb-nop-xceiv";
31 #phy-cells = <0>;
36 ps-clk-frequency = <33333333>;
40 bootph-all;
46 phy-mode = "rgmii-id";
47 phy-handle = <ðernet_phy>;
49 ethernet_phy: ethernet-phy@0 {
55 bootph-all;
60 bootph-all;
67 usb-phy = <&usb_phy0>;
68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_usb0_default>;
73 pinctrl_usb0_default: usb0-default {
81 slew-rate = <0>;
82 io-standard = <1>;
85 conf-rx {
87 bias-high-impedance;
90 conf-tx {
93 bias-disable;