Lines Matching +full:slew +full:- +full:rate
1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 /include/ "zynq-7000.dtsi"
10 compatible = "ebang,ebaz4205", "xlnx,zynq-7000";
23 stdout-path = "serial0:115200n8";
28 ps-clk-frequency = <33333333>;
29 fclk-enable = <8>;
34 phy-mode = "mii";
35 phy-handle = <&phy>;
38 assigned-clocks = <&clkc 18>;
39 assigned-clock-rates = <25000000>;
41 phy: ethernet-phy@0 {
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_gpio0_default>;
60 pinctrl_gpio0_default: gpio0-default {
68 io-standard = <3>;
69 slew-rate = <0>;
72 conf-pull-up {
74 bias-disable;
78 pinctrl_sdhci0_default: sdhci0-default {
86 io-standard = <3>;
87 slew-rate = <0>;
88 bias-disable;
91 mux-cd {
96 conf-cd {
98 io-standard = <3>;
99 slew-rate = <0>;
100 bias-high-impedance;
101 bias-pull-up;
105 pinctrl_uart1_default: uart1-default {
113 io-standard = <3>;
114 slew-rate = <0>;
117 conf-rx {
119 bias-high-impedance;
122 conf-tx {
124 bias-disable;
135 disable-wp;
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_sdhci0_default>;
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_uart1_default>;