Lines Matching +full:pinctrl +full:- +full:zynq
1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 /include/ "zynq-7000.dtsi"
10 compatible = "ebang,ebaz4205", "xlnx,zynq-7000";
23 stdout-path = "serial0:115200n8";
28 ps-clk-frequency = <33333333>;
29 fclk-enable = <8>;
34 phy-mode = "mii";
35 phy-handle = <&phy>;
38 assigned-clocks = <&clkc 18>;
39 assigned-clock-rates = <25000000>;
41 phy: ethernet-phy@0 {
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_gpio0_default>;
54 #address-cells = <1>;
55 #size-cells = <0>;
62 pinctrl_gpio0_default: gpio0-default {
70 io-standard = <3>;
71 slew-rate = <0>;
74 conf-pull-up {
76 bias-disable;
80 pinctrl_sdhci0_default: sdhci0-default {
88 io-standard = <3>;
89 slew-rate = <0>;
90 bias-disable;
93 mux-cd {
98 conf-cd {
100 io-standard = <3>;
101 slew-rate = <0>;
102 bias-high-impedance;
103 bias-pull-up;
107 pinctrl_uart1_default: uart1-default {
115 io-standard = <3>;
116 slew-rate = <0>;
119 conf-rx {
121 bias-high-impedance;
124 conf-tx {
126 bias-disable;
137 disable-wp;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_sdhci0_default>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_uart1_default>;