Lines Matching +full:platform +full:- +full:pll
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8850.dtsi - Device tree file for Wondermedia WM8850 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "simple-bus";
41 interrupt-parent = <&intc0>;
43 intc0: interrupt-controller@d8140000 {
44 compatible = "via,vt8500-intc";
45 interrupt-controller;
47 #interrupt-cells = <1>;
51 intc1: interrupt-controller@d8150000 {
52 compatible = "via,vt8500-intc";
53 interrupt-controller;
54 #interrupt-cells = <1>;
60 compatible = "wm,wm8850-pinctrl";
62 interrupt-controller;
63 #interrupt-cells = <2>;
64 gpio-controller;
65 #gpio-cells = <2>;
69 compatible = "via,vt8500-pmc";
73 #address-cells = <1>;
74 #size-cells = <0>;
77 #clock-cells = <0>;
78 compatible = "fixed-clock";
79 clock-frequency = <25000000>;
83 #clock-cells = <0>;
84 compatible = "fixed-clock";
85 clock-frequency = <24000000>;
89 #clock-cells = <0>;
90 compatible = "wm,wm8850-pll-clock";
96 #clock-cells = <0>;
97 compatible = "wm,wm8850-pll-clock";
103 #clock-cells = <0>;
104 compatible = "wm,wm8850-pll-clock";
110 #clock-cells = <0>;
111 compatible = "wm,wm8850-pll-clock";
117 #clock-cells = <0>;
118 compatible = "wm,wm8850-pll-clock";
124 #clock-cells = <0>;
125 compatible = "wm,wm8850-pll-clock";
131 #clock-cells = <0>;
132 compatible = "wm,wm8850-pll-clock";
138 #clock-cells = <0>;
139 compatible = "via,vt8500-device-clock";
141 divisor-reg = <0x300>;
145 #clock-cells = <0>;
146 compatible = "via,vt8500-device-clock";
148 divisor-reg = <0x304>;
152 #clock-cells = <0>;
153 compatible = "via,vt8500-device-clock";
155 divisor-reg = <0x320>;
159 #clock-cells = <0>;
160 compatible = "via,vt8500-device-clock";
162 divisor-reg = <0x310>;
166 #clock-cells = <0>;
167 compatible = "via,vt8500-device-clock";
169 enable-reg = <0x254>;
170 enable-bit = <24>;
174 #clock-cells = <0>;
175 compatible = "via,vt8500-device-clock";
177 enable-reg = <0x254>;
178 enable-bit = <25>;
182 #clock-cells = <0>;
183 compatible = "via,vt8500-device-clock";
185 enable-reg = <0x254>;
186 enable-bit = <26>;
190 #clock-cells = <0>;
191 compatible = "via,vt8500-device-clock";
193 enable-reg = <0x254>;
194 enable-bit = <27>;
198 #clock-cells = <0>;
199 compatible = "via,vt8500-device-clock";
201 divisor-reg = <0x350>;
202 enable-reg = <0x250>;
203 enable-bit = <17>;
207 #clock-cells = <0>;
208 compatible = "via,vt8500-device-clock";
210 divisor-reg = <0x330>;
211 divisor-mask = <0x3f>;
212 enable-reg = <0x250>;
213 enable-bit = <0>;
219 compatible = "wm,wm8505-fb";
224 compatible = "wm,prizm-ge-rops";
229 #pwm-cells = <3>;
230 compatible = "via,vt8500-pwm";
236 compatible = "via,vt8500-timer";
242 compatible = "via,vt8500-ehci";
248 compatible = "platform-uhci";
254 compatible = "platform-uhci";
260 compatible = "via,vt8500-uart";
268 compatible = "via,vt8500-uart";
276 compatible = "via,vt8500-uart";
284 compatible = "via,vt8500-uart";
292 compatible = "via,vt8500-rtc";
298 compatible = "wm,wm8505-sdhc";
302 bus-width = <4>;
303 sdon-inverted;
307 compatible = "via,vt8500-rhine";