Lines Matching +full:timer +full:- +full:dsp
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/omap.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
33 #address-cells = <1>;
34 #size-cells = <0>;
37 compatible = "arm,cortex-a8";
42 clock-names = "cpu";
44 clock-latency = <300000>; /* From omap-cpufreq driver */
49 compatible = "arm,cortex-a8-pmu";
60 compatible = "ti,omap-infra";
62 compatible = "ti,omap3-mpu";
70 dsp {
71 compatible = "ti,omap3-c64";
84 compatible = "ti,omap3-l3-smx", "simple-bus";
87 #address-cells = <1>;
88 #size-cells = <1>;
93 compatible = "ti,omap3-l4-core", "simple-bus";
94 #address-cells = <1>;
95 #size-cells = <1>;
99 compatible = "ti,omap3-scm", "simple-bus";
101 #address-cells = <1>;
102 #size-cells = <1>;
106 compatible = "ti,omap3-padconf",
107 "pinctrl-single";
109 #address-cells = <1>;
110 #size-cells = <0>;
111 #pinctrl-cells = <1>;
112 #interrupt-cells = <1>;
113 interrupt-controller;
114 pinctrl-single,register-width = <16>;
115 pinctrl-single,function-mask = <0xff1f>;
119 compatible = "syscon", "simple-bus";
121 #address-cells = <1>;
122 #size-cells = <1>;
126 compatible = "ti,pbias-omap3", "ti,pbias-omap";
130 regulator-name = "pbias_mmc_omap2430";
131 regulator-min-microvolt = <1800000>;
132 regulator-max-microvolt = <3000000>;
137 #address-cells = <1>;
138 #size-cells = <0>;
146 compatible = "ti,omap3-padconf",
147 "pinctrl-single";
149 #address-cells = <1>;
150 #size-cells = <0>;
151 #pinctrl-cells = <1>;
152 #interrupt-cells = <1>;
153 interrupt-controller;
154 pinctrl-single,register-width = <16>;
155 pinctrl-single,function-mask = <0xff1f>;
160 aes1_target: target-module@480a6000 {
161 compatible = "ti,sysc-omap2", "ti,sysc";
165 reg-names = "rev", "sysc", "syss";
166 ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
167 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
170 ti,syss-mask = <1>;
172 clock-names = "ick";
173 #address-cells = <1>;
174 #size-cells = <1>;
178 compatible = "ti,omap3-aes";
182 dma-names = "tx", "rx";
186 aes2_target: target-module@480c5000 {
187 compatible = "ti,sysc-omap2", "ti,sysc";
191 reg-names = "rev", "sysc", "syss";
192 ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
193 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
196 ti,syss-mask = <1>;
198 clock-names = "ick";
199 #address-cells = <1>;
200 #size-cells = <1>;
204 compatible = "ti,omap3-aes";
208 dma-names = "tx", "rx";
213 compatible = "ti,omap3-prm";
218 #address-cells = <1>;
219 #size-cells = <0>;
227 compatible = "ti,omap3-cm";
231 #address-cells = <1>;
232 #size-cells = <0>;
239 target-module@48320000 {
240 compatible = "ti,sysc-omap2", "ti,sysc";
243 reg-names = "rev", "sysc";
244 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
247 clock-names = "fck", "ick";
248 #address-cells = <1>;
249 #size-cells = <1>;
253 compatible = "ti,omap-counter32k";
258 intc: interrupt-controller@48200000 {
259 compatible = "ti,omap3-intc";
260 interrupt-controller;
261 #interrupt-cells = <1>;
265 target-module@48056000 {
266 compatible = "ti,sysc-omap2", "ti,sysc";
270 reg-names = "rev", "sysc", "syss";
271 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
275 ti,sysc-midle = <SYSC_IDLE_FORCE>,
278 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
281 ti,syss-mask = <1>;
284 clock-names = "ick";
285 #address-cells = <1>;
286 #size-cells = <1>;
289 sdma: dma-controller@0 {
290 compatible = "ti,omap3430-sdma", "ti,omap-sdma";
296 #dma-cells = <1>;
297 dma-channels = <32>;
298 dma-requests = <96>;
303 compatible = "ti,omap3-gpio";
307 ti,gpio-always-on;
308 gpio-controller;
309 #gpio-cells = <2>;
310 interrupt-controller;
311 #interrupt-cells = <2>;
315 compatible = "ti,omap3-gpio";
319 gpio-controller;
320 #gpio-cells = <2>;
321 interrupt-controller;
322 #interrupt-cells = <2>;
326 compatible = "ti,omap3-gpio";
330 gpio-controller;
331 #gpio-cells = <2>;
332 interrupt-controller;
333 #interrupt-cells = <2>;
337 compatible = "ti,omap3-gpio";
341 gpio-controller;
342 #gpio-cells = <2>;
343 interrupt-controller;
344 #interrupt-cells = <2>;
348 compatible = "ti,omap3-gpio";
352 gpio-controller;
353 #gpio-cells = <2>;
354 interrupt-controller;
355 #interrupt-cells = <2>;
359 compatible = "ti,omap3-gpio";
363 gpio-controller;
364 #gpio-cells = <2>;
365 interrupt-controller;
366 #interrupt-cells = <2>;
370 compatible = "ti,omap3-uart";
372 interrupts-extended = <&intc 72>;
374 dma-names = "tx", "rx";
376 clock-frequency = <48000000>;
380 compatible = "ti,omap3-uart";
382 interrupts-extended = <&intc 73>;
384 dma-names = "tx", "rx";
386 clock-frequency = <48000000>;
390 compatible = "ti,omap3-uart";
392 interrupts-extended = <&intc 74>;
394 dma-names = "tx", "rx";
396 clock-frequency = <48000000>;
400 compatible = "ti,omap3-i2c";
403 #address-cells = <1>;
404 #size-cells = <0>;
409 compatible = "ti,omap3-i2c";
412 #address-cells = <1>;
413 #size-cells = <0>;
418 compatible = "ti,omap3-i2c";
421 #address-cells = <1>;
422 #size-cells = <0>;
427 compatible = "ti,omap3-mailbox";
431 #mbox-cells = <1>;
432 ti,mbox-num-users = <2>;
433 ti,mbox-num-fifos = <2>;
434 mbox_dsp: mbox-dsp {
435 ti,mbox-tx = <0 0 0>;
436 ti,mbox-rx = <1 0 0>;
441 compatible = "ti,omap2-mcspi";
444 #address-cells = <1>;
445 #size-cells = <0>;
447 ti,spi-num-cs = <4>;
456 dma-names = "tx0", "rx0", "tx1", "rx1",
461 compatible = "ti,omap2-mcspi";
464 #address-cells = <1>;
465 #size-cells = <0>;
467 ti,spi-num-cs = <2>;
472 dma-names = "tx0", "rx0", "tx1", "rx1";
476 compatible = "ti,omap2-mcspi";
479 #address-cells = <1>;
480 #size-cells = <0>;
482 ti,spi-num-cs = <2>;
487 dma-names = "tx0", "rx0", "tx1", "rx1";
491 compatible = "ti,omap2-mcspi";
494 #address-cells = <1>;
495 #size-cells = <0>;
497 ti,spi-num-cs = <1>;
499 dma-names = "tx0", "rx0";
503 compatible = "ti,omap3-1w";
510 compatible = "ti,omap3-hsmmc";
514 ti,dual-volt;
516 dma-names = "tx", "rx";
517 pbias-supply = <&pbias_mmc_reg>;
521 compatible = "ti,omap3-hsmmc";
526 dma-names = "tx", "rx";
530 compatible = "ti,omap3-hsmmc";
535 dma-names = "tx", "rx";
539 #iommu-cells = <0>;
540 compatible = "ti,omap2-iommu";
544 ti,#tlb-entries = <8>;
548 #iommu-cells = <0>;
549 compatible = "ti,omap2-iommu";
557 compatible = "ti,omap3-wdt";
563 compatible = "ti,omap3-mcbsp";
565 reg-names = "mpu";
569 interrupt-names = "common", "tx", "rx";
570 ti,buffer-size = <128>;
574 dma-names = "tx", "rx";
576 clock-names = "fck";
581 rng_target: target-module@480a0000 {
582 compatible = "ti,sysc-omap2", "ti,sysc";
586 reg-names = "rev", "sysc", "syss";
587 ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
588 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
590 ti,syss-mask = <1>;
592 clock-names = "ick";
593 #address-cells = <1>;
594 #size-cells = <1>;
598 compatible = "ti,omap2-rng";
605 compatible = "ti,omap3-mcbsp";
608 reg-names = "mpu", "sidetone";
613 interrupt-names = "common", "tx", "rx", "sidetone";
614 ti,buffer-size = <1280>;
618 dma-names = "tx", "rx";
620 clock-names = "fck", "ick";
625 compatible = "ti,omap3-mcbsp";
628 reg-names = "mpu", "sidetone";
633 interrupt-names = "common", "tx", "rx", "sidetone";
634 ti,buffer-size = <128>;
638 dma-names = "tx", "rx";
640 clock-names = "fck", "ick";
645 compatible = "ti,omap3-mcbsp";
647 reg-names = "mpu";
651 interrupt-names = "common", "tx", "rx";
652 ti,buffer-size = <128>;
656 dma-names = "tx", "rx";
658 clock-names = "fck";
659 #sound-dai-cells = <0>;
664 compatible = "ti,omap3-mcbsp";
666 reg-names = "mpu";
670 interrupt-names = "common", "tx", "rx";
671 ti,buffer-size = <128>;
675 dma-names = "tx", "rx";
677 clock-names = "fck";
682 compatible = "ti,omap3-sham";
687 dma-names = "rx";
690 timer1_target: target-module@48318000 {
691 compatible = "ti,sysc-omap2-timer", "ti,sysc";
695 reg-names = "rev", "sysc", "syss";
696 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
701 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
704 ti,syss-mask = <1>;
706 clock-names = "fck", "ick";
707 #address-cells = <1>;
708 #size-cells = <1>;
711 timer1: timer@0 {
712 compatible = "ti,omap3430-timer";
715 clock-names = "fck";
717 ti,timer-alwon;
721 timer2_target: target-module@49032000 {
722 compatible = "ti,sysc-omap2-timer", "ti,sysc";
726 reg-names = "rev", "sysc", "syss";
727 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
732 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
735 ti,syss-mask = <1>;
737 clock-names = "fck", "ick";
738 #address-cells = <1>;
739 #size-cells = <1>;
742 timer2: timer@0 {
743 compatible = "ti,omap3430-timer";
749 timer3: timer@49034000 {
750 compatible = "ti,omap3430-timer";
756 timer4: timer@49036000 {
757 compatible = "ti,omap3430-timer";
763 timer5: timer@49038000 {
764 compatible = "ti,omap3430-timer";
768 ti,timer-dsp;
771 timer6: timer@4903a000 {
772 compatible = "ti,omap3430-timer";
776 ti,timer-dsp;
779 timer7: timer@4903c000 {
780 compatible = "ti,omap3430-timer";
784 ti,timer-dsp;
787 timer8: timer@4903e000 {
788 compatible = "ti,omap3430-timer";
792 ti,timer-pwm;
793 ti,timer-dsp;
796 timer9: timer@49040000 {
797 compatible = "ti,omap3430-timer";
801 ti,timer-pwm;
804 timer10: timer@48086000 {
805 compatible = "ti,omap3430-timer";
809 ti,timer-pwm;
812 timer11: timer@48088000 {
813 compatible = "ti,omap3430-timer";
817 ti,timer-pwm;
820 timer12_target: target-module@48304000 {
821 compatible = "ti,sysc-omap2-timer", "ti,sysc";
825 reg-names = "rev", "sysc", "syss";
826 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
831 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
834 ti,syss-mask = <1>;
836 clock-names = "fck", "ick";
837 #address-cells = <1>;
838 #size-cells = <1>;
841 timer12: timer@0 {
842 compatible = "ti,omap3430-timer";
845 ti,timer-alwon;
846 ti,timer-secure;
851 compatible = "ti,usbhs-tll";
858 compatible = "ti,usbhs-host";
861 #address-cells = <1>;
862 #size-cells = <1>;
866 compatible = "ti,ohci-omap3";
869 remote-wakeup-connected;
873 compatible = "ti,ehci-omap";
880 compatible = "ti,omap3430-gpmc";
885 dma-names = "rxtx";
886 gpmc,num-cs = <8>;
887 gpmc,num-waitpins = <4>;
888 #address-cells = <2>;
889 #size-cells = <1>;
890 interrupt-controller;
891 #interrupt-cells = <2>;
892 gpio-controller;
893 #gpio-cells = <2>;
896 usb_otg_target: target-module@480ab000 {
897 compatible = "ti,sysc-omap2", "ti,sysc";
901 reg-names = "rev", "sysc", "syss";
902 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
905 ti,sysc-midle = <SYSC_IDLE_FORCE>,
908 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
911 ti,syss-mask = <1>;
913 clock-names = "fck";
914 #address-cells = <1>;
915 #size-cells = <1>;
919 compatible = "ti,omap3-musb";
922 interrupt-names = "mc", "dma";
924 num-eps = <16>;
925 ram-bits = <12>;
930 compatible = "ti,omap3-dss";
935 clock-names = "fck";
936 #address-cells = <1>;
937 #size-cells = <1>;
941 compatible = "ti,omap3-dispc";
946 clock-names = "fck";
950 compatible = "ti,omap3-dsi";
954 reg-names = "proto", "phy", "pll";
959 clock-names = "fck", "sys_clk";
961 #address-cells = <1>;
962 #size-cells = <0>;
966 compatible = "ti,omap3-rfbi";
971 clock-names = "fck", "ick";
975 compatible = "ti,omap3-venc";
980 clock-names = "fck";
984 ssi: ssi-controller@48058000 {
985 compatible = "ti,omap3-ssi";
992 reg-names = "sys",
996 interrupt-names = "gdd_mpu";
998 #address-cells = <1>;
999 #size-cells = <1>;
1002 ssi_port1: ssi-port@4805a000 {
1003 compatible = "ti,omap3-ssi-port";
1007 reg-names = "tx",
1014 ssi_port2: ssi-port@4805b000 {
1015 compatible = "ti,omap3-ssi-port";
1019 reg-names = "tx",
1029 #include "omap3xxx-clocks.dtsi"
1031 /* Preferred always-on timer for clockevent. Some boards must use dmtimer12 */
1033 ti,no-reset-on-init;
1034 ti,no-idle;
1035 timer@0 {
1036 assigned-clocks = <&gpt1_fck>;
1037 assigned-clock-parents = <&omap_32k_fck>;