Lines Matching +full:0 +full:x0010000

129 			#size-cells = <0>;
131 			port@0 {
132 				reg = <0>;
194 		#clock-cells = <0>;
202 			DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
203 			DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1)	/* wakeup0.dcan1_rx */
209 			DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP)	/* dcan1_tx.off */
210 			DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP)	/* wakeup0.off */
221 		reg = <0x20>;
230 		reg = <0x21>;
231 		lines-initial-states = <0x1408>;
239 		#sound-dai-cells = <0>;
241 		reg = <0x19>;
260 		reg = <0x26>;
269 		lines-initial-states = <0x0f2b>;
282 		reg = <0x3c>;
290 				clock-lanes = <0>;
301 			      <&dra7_pmx_core 0x3e0>;
315 	ranges = <0 0 0x08000000 0x01000000>;	/* minimum GPMC partition = 16MB */
316 	nand@0,0 {
322 		reg = <0 0 4>;		/* device IO registers */
324 		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
326 		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
332 		gpmc,sync-clk-ps = <0>;
333 		gpmc,cs-on-ns = <0>;
336 		gpmc,adv-on-ns = <0>;
347 		gpmc,bus-turnaround-ns = <0>;
348 		gpmc,cycle2cycle-delay-ns = <0>;
349 		gpmc,clk-activation-ns = <0>;
350 		gpmc,wr-data-mux-bus-ns = <0>;
357 		partition@0 {
359 			reg = <0x00000000 0x00020000>;
363 			reg = <0x00020000 0x00020000>;
367 			reg = <0x00040000 0x00020000>;
371 			reg = <0x00060000 0x00020000>;
375 			reg = <0x00080000 0x00040000>;
379 			reg = <0x000c0000 0x00100000>;
383 			reg = <0x001c0000 0x00020000>;
387 			reg = <0x001e0000 0x00020000>;
391 			reg = <0x00200000 0x00800000>;
395 			reg = <0x00a00000 0x0f600000>;
421 	pinctrl-0 = <&mmc1_pins_default>;
436 	pinctrl-0 = <&mmc2_pins_default>;
451 	pinctrl-0 = <&mmc4_pins_default>;
456 	#size-cells = <0>;
468 	pinctrl-0 = <&dcan1_pins_sleep>;
477 	flash@0 {
480 		reg = <0>;
491 		partition@0 {
493 			reg = <0x00000000 0x00010000>;
497 			reg = <0x00010000 0x00010000>;
501 			reg = <0x00020000 0x00010000>;
505 			reg = <0x00030000 0x00010000>;
509 			reg = <0x00040000 0x00100000>;
513 			reg = <0x00140000 0x00080000>;
517 			reg = <0x001c0000 0x00010000>;
521 			reg = <0x001d0000 0x0010000>;
525 			reg = <0x001e0000 0x0800000>;
529 			reg = <0x009e0000 0x01620000>;
555 	assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
566 	#sound-dai-cells = <0>;
573 	op-mode = <0>;          /* MCASP_IIS_MODE */
576 	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
577 		1 2 0 0
590 		clock-lanes = <0>;