Lines Matching refs:PIN_INPUT
95 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
96 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
102 DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */
103 DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */
130 DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
131 DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d0 */
132 DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d1 */
133 DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
174 DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
175 DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
176 DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
177 DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
178 DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
179 DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
180 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
181 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
182 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
183 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
184 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
185 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
188 DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
189 DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
190 DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
191 DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
192 DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
193 DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
194 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
195 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
196 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
197 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
198 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
199 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
213 DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15)
214 DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15)
235 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
236 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
237 DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
238 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)