Lines Matching +full:0 +full:x4230
9 #clock-cells = <0>;
14 reg = <0x0040>;
18 #clock-cells = <0>;
23 reg = <0x0040>;
27 #clock-cells = <0>;
32 reg = <0x0040>;
36 #clock-cells = <0>;
45 #clock-cells = <0>;
54 #clock-cells = <0>;
63 #clock-cells = <0>;
72 #clock-cells = <0>;
81 #clock-cells = <0>;
90 #clock-cells = <0>;
99 #clock-cells = <0>;
108 #clock-cells = <0>;
117 #clock-cells = <0>;
125 ehrpwm0_tbclk: clock-ehrpwm0-tbclk-0@664 {
126 #clock-cells = <0>;
130 ti,bit-shift = <0>;
131 reg = <0x0664>;
135 #clock-cells = <0>;
140 reg = <0x0664>;
144 #clock-cells = <0>;
149 reg = <0x0664>;
153 #clock-cells = <0>;
158 reg = <0x0664>;
162 #clock-cells = <0>;
167 reg = <0x0664>;
171 #clock-cells = <0>;
176 reg = <0x0664>;
181 #clock-cells = <0>;
188 #clock-cells = <0>;
195 #clock-cells = <0>;
202 #clock-cells = <0>;
209 #clock-cells = <0>;
216 #clock-cells = <0>;
223 #clock-cells = <0>;
230 #clock-cells = <0>;
234 reg = <0x2d20>, <0x2d24>, <0x2d2c>, <0x2d48>, <0x2d4c>;
238 #clock-cells = <0>;
245 #clock-cells = <0>;
251 reg = <0x2d38>;
257 #clock-cells = <0>;
263 reg = <0x2d3c>;
269 #clock-cells = <0>;
275 reg = <0x2d40>;
281 #clock-cells = <0>;
285 reg = <0x2d60>, <0x2d64>, <0x2d6c>, <0x2d88>, <0x2d8c>;
289 #clock-cells = <0>;
295 reg = <0x2d70>;
301 #clock-cells = <0>;
310 #clock-cells = <0>;
314 reg = <0x2da0>, <0x2da4>, <0x2dac>, <0x2dc8>, <0x2dcc>;
318 #clock-cells = <0>;
324 reg = <0x2db0>;
330 #clock-cells = <0>;
334 reg = <0x2e20>, <0x2e24>, <0x2e2c>, <0x2e48>, <0x2e4c>;
338 #clock-cells = <0>;
344 reg = <0x2e30>;
351 #clock-cells = <0>;
355 reg = <0x2de0>, <0x2de4>, <0x2dec>, <0x2e08>, <0x2e0c>;
359 #clock-cells = <0>;
365 reg = <0x2df0>;
371 #clock-cells = <0>;
380 #clock-cells = <0>;
389 #clock-cells = <0>;
398 #clock-cells = <0>;
407 #clock-cells = <0>;
412 reg = <0x2a38>;
416 #clock-cells = <0>;
425 #clock-cells = <0>;
429 reg = <0x4248>;
433 #clock-cells = <0>;
440 #clock-cells = <0>;
444 reg = <0x4200>;
448 #clock-cells = <0>;
452 reg = <0x4204>;
456 #clock-cells = <0>;
460 reg = <0x4208>;
464 #clock-cells = <0>;
468 reg = <0x420c>;
472 #clock-cells = <0>;
476 reg = <0x4210>;
480 #clock-cells = <0>;
484 reg = <0x4214>;
488 #clock-cells = <0>;
492 reg = <0x4218>;
496 #clock-cells = <0>;
500 reg = <0x422c>;
504 #clock-cells = <0>;
507 reg = <0x424c>;
511 #clock-cells = <0>;
520 #clock-cells = <0>;
529 #clock-cells = <0>;
538 #clock-cells = <0>;
547 #clock-cells = <0>;
556 #clock-cells = <0>;
565 #clock-cells = <0>;
569 reg = <0x4238>;
573 #clock-cells = <0>;
577 reg = <0x4234>;
583 #clock-cells = <0>;
590 #clock-cells = <0>;
594 reg = <0x4240>;
598 #clock-cells = <0>;
607 #clock-cells = <0>;
612 reg = <0x423c>;
616 #clock-cells = <0>;
620 reg = <0x423c>;
625 #clock-cells = <0>;
629 reg = <0x4244>;
634 #clock-cells = <0>;
638 reg = <0x2e60>, <0x2e64>, <0x2e6c>, <0x2e88>, <0x2e8c>;
642 #clock-cells = <0>;
648 reg = <0x2e70>;
654 #clock-cells = <0>;
658 reg = <0x4230>;
662 #clock-cells = <0>;
666 reg = <0x421c>;
670 #clock-cells = <0>;
674 reg = <0x4220>;
678 #clock-cells = <0>;
682 reg = <0x4224>;
686 #clock-cells = <0>;
690 reg = <0x4228>;
694 #clock-cells = <0>;
703 #clock-cells = <0>;
712 #clock-cells = <0>;
719 #clock-cells = <0>;
725 reg = <0x2db8>;
731 #clock-cells = <0>;
738 reg = <0x2e14>;
743 #clock-cells = <0>;
747 reg = <0x4250>;
752 #clock-cells = <0>;
761 #clock-cells = <0>;
770 #clock-cells = <0>;
779 #clock-cells = <0>;
783 reg = <0x4260>;
787 #clock-cells = <0>;
792 reg = <0x2a40>;
796 #clock-cells = <0>;
801 reg = <0x2a48>;
805 #clock-cells = <0>;
811 reg = <0x4100>;
815 #clock-cells = <0>;
821 reg = <0x4100>;
825 #clock-cells = <0>;
831 reg = <0x4100>;
835 #clock-cells = <0>;
842 reg = <0x4100>;
846 #clock-cells = <0>;
852 reg = <0x4100>;
856 #clock-cells = <0>;
861 reg = <0x4100>;
869 reg = <0x2800 0x400>;
872 ranges = <0 0x2800 0x400>;
877 reg = <0x120 0x4>;
884 reg = <0x228 0xc>;
891 reg = <0x220 0x4>, <0x328 0x44>;
900 reg = <0x8300 0x100>;
903 ranges = <0 0x8300 0x100>;
908 reg = <0x20 0x4>;
916 reg = <0x8400 0x100>;
919 ranges = <0 0x8400 0x100>;
924 reg = <0x20 0x4>;
932 reg = <0x8500 0x100>;
935 ranges = <0 0x8500 0x100>;
940 reg = <0x20 0x4>;
948 reg = <0x8800 0xc00>;
951 ranges = <0 0x8800 0xc00>;
956 reg = <0x20 0x3c>, <0x78 0x2c>;
963 reg = <0x68 0xc>, <0x220 0x4c>;
970 reg = <0x320 0x4>;
977 reg = <0x420 0x1a4>;
984 reg = <0x720 0x4>;
991 reg = <0xa20 0x4>;
998 reg = <0xb20 0x4>;