Lines Matching +full:pmu +full:- +full:sram
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/am33xx.h>
11 #include <dt-bindings/clock/am3.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 d-can0 = &dcan0;
31 d-can1 = &dcan1;
46 #address-cells = <1>;
47 #size-cells = <0>;
49 compatible = "arm,cortex-a8";
50 enable-method = "ti,am3352";
54 operating-points-v2 = <&cpu0_opp_table>;
57 clock-names = "cpu";
59 clock-latency = <300000>; /* From omap-cpufreq driver */
60 cpu-idle-states = <&mpu_gate>;
63 idle-states {
65 compatible = "arm,idle-state";
66 entry-latency-us = <40>;
67 exit-latency-us = <90>;
68 min-residency-us = <300>;
69 ti,idle-wkup-m3;
74 cpu0_opp_table: opp-table {
75 compatible = "operating-points-v2-ti-cpu";
79 * The three following nodes are marked with opp-suspend
83 opp-50-300000000 {
85 opp-hz = /bits/ 64 <300000000>;
86 opp-microvolt = <950000 931000 969000>;
87 opp-supported-hw = <0x06 0x0010>;
88 opp-suspend;
91 opp-100-275000000 {
92 /* OPP100-1 */
93 opp-hz = /bits/ 64 <275000000>;
94 opp-microvolt = <1100000 1078000 1122000>;
95 opp-supported-hw = <0x01 0x00FF>;
96 opp-suspend;
99 opp-100-300000000 {
100 /* OPP100-2 */
101 opp-hz = /bits/ 64 <300000000>;
102 opp-microvolt = <1100000 1078000 1122000>;
103 opp-supported-hw = <0x06 0x0020>;
104 opp-suspend;
107 opp-100-500000000 {
108 /* OPP100-3 */
109 opp-hz = /bits/ 64 <500000000>;
110 opp-microvolt = <1100000 1078000 1122000>;
111 opp-supported-hw = <0x01 0xFFFF>;
114 opp-100-600000000 {
115 /* OPP100-4 */
116 opp-hz = /bits/ 64 <600000000>;
117 opp-microvolt = <1100000 1078000 1122000>;
118 opp-supported-hw = <0x06 0x0040>;
121 opp-120-600000000 {
122 /* OPP120-1 */
123 opp-hz = /bits/ 64 <600000000>;
124 opp-microvolt = <1200000 1176000 1224000>;
125 opp-supported-hw = <0x01 0xFFFF>;
128 opp-120-720000000 {
129 /* OPP120-2 */
130 opp-hz = /bits/ 64 <720000000>;
131 opp-microvolt = <1200000 1176000 1224000>;
132 opp-supported-hw = <0x06 0x0080>;
135 opp-720000000 {
136 /* OPP Turbo-1 */
137 opp-hz = /bits/ 64 <720000000>;
138 opp-microvolt = <1260000 1234800 1285200>;
139 opp-supported-hw = <0x01 0xFFFF>;
142 opp-800000000 {
143 /* OPP Turbo-2 */
144 opp-hz = /bits/ 64 <800000000>;
145 opp-microvolt = <1260000 1234800 1285200>;
146 opp-supported-hw = <0x06 0x0100>;
149 opp-1000000000 {
151 opp-hz = /bits/ 64 <1000000000>;
152 opp-microvolt = <1325000 1298500 1351500>;
153 opp-supported-hw = <0x04 0x0200>;
157 target-module@4b000000 {
158 compatible = "ti,sysc-omap4-simple", "ti,sysc";
160 clock-names = "fck";
161 ti,no-idle;
162 #address-cells = <1>;
163 #size-cells = <1>;
166 target-module@140000 {
167 compatible = "ti,sysc-omap4-simple", "ti,sysc";
169 clock-names = "fck";
170 #address-cells = <1>;
171 #size-cells = <1>;
174 pmu@0 {
175 compatible = "arm,cortex-a8-pmu";
186 compatible = "ti,omap-infra";
197 compatible = "simple-pm-bus";
198 power-domains = <&prm_per>;
200 clock-names = "fck";
201 #address-cells = <1>;
202 #size-cells = <1>;
216 intc: interrupt-controller@48200000 {
217 compatible = "ti,am33xx-intc";
218 interrupt-controller;
219 #interrupt-cells = <1>;
223 target-module@49000000 {
224 compatible = "ti,sysc-omap4", "ti,sysc";
226 reg-names = "rev";
228 clock-names = "fck";
229 #address-cells = <1>;
230 #size-cells = <1>;
234 compatible = "ti,edma3-tpcc";
236 reg-names = "edma3_cc";
238 interrupt-names = "edma3_ccint", "edma3_mperr",
240 dma-requests = <64>;
241 #dma-cells = <2>;
246 ti,edma-memcpy-channels = <20 21>;
250 target-module@49800000 {
251 compatible = "ti,sysc-omap4", "ti,sysc";
254 reg-names = "rev", "sysc";
255 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
256 ti,sysc-midle = <SYSC_IDLE_FORCE>;
257 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
260 clock-names = "fck";
261 #address-cells = <1>;
262 #size-cells = <1>;
266 compatible = "ti,edma3-tptc";
269 interrupt-names = "edma3_tcerrint";
273 target-module@49900000 {
274 compatible = "ti,sysc-omap4", "ti,sysc";
277 reg-names = "rev", "sysc";
278 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
279 ti,sysc-midle = <SYSC_IDLE_FORCE>;
280 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
283 clock-names = "fck";
284 #address-cells = <1>;
285 #size-cells = <1>;
289 compatible = "ti,edma3-tptc";
292 interrupt-names = "edma3_tcerrint";
296 target-module@49a00000 {
297 compatible = "ti,sysc-omap4", "ti,sysc";
300 reg-names = "rev", "sysc";
301 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
302 ti,sysc-midle = <SYSC_IDLE_FORCE>;
303 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
306 clock-names = "fck";
307 #address-cells = <1>;
308 #size-cells = <1>;
312 compatible = "ti,edma3-tptc";
315 interrupt-names = "edma3_tcerrint";
319 target-module@47810000 {
320 compatible = "ti,sysc-omap2", "ti,sysc";
324 reg-names = "rev", "sysc", "syss";
325 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
329 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
332 ti,syss-mask = <1>;
334 clock-names = "fck";
335 #address-cells = <1>;
336 #size-cells = <1>;
340 compatible = "ti,am335-sdhci";
341 ti,needs-special-reset;
348 usb: target-module@47400000 {
349 compatible = "ti,sysc-omap4", "ti,sysc";
352 reg-names = "rev", "sysc";
353 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
355 ti,sysc-midle = <SYSC_IDLE_FORCE>,
358 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
362 ti,sysc-delay-us = <2>;
364 clock-names = "fck";
365 #address-cells = <1>;
366 #size-cells = <1>;
369 usb0_phy: usb-phy@1300 {
370 compatible = "ti,am335x-usb-phy";
372 reg-names = "phy";
374 #phy-cells = <0>;
378 compatible = "ti,musb-am33xx";
381 reg-names = "mc", "control";
384 interrupt-names = "mc";
387 mentor,num-eps = <16>;
388 mentor,ram-bits = <12>;
407 dma-names =
416 usb1_phy: usb-phy@1b00 {
417 compatible = "ti,am335x-usb-phy";
419 reg-names = "phy";
421 #phy-cells = <0>;
425 compatible = "ti,musb-am33xx";
428 reg-names = "mc", "control";
430 interrupt-names = "mc";
433 mentor,num-eps = <16>;
434 mentor,ram-bits = <12>;
453 dma-names =
462 cppi41dma: dma-controller@2000 {
463 compatible = "ti,am3359-cppi41";
468 reg-names = "glue", "controller", "scheduler", "queuemgr";
470 interrupt-names = "glue";
471 #dma-cells = <2>;
473 #dma-channels = <30>;
474 dma-channels = <30>;
475 #dma-requests = <256>;
476 dma-requests = <256>;
480 target-module@40300000 {
481 compatible = "ti,sysc-omap4-simple", "ti,sysc";
483 clock-names = "fck";
484 ti,no-idle;
485 #address-cells = <1>;
486 #size-cells = <1>;
489 ocmcram: sram@0 {
490 compatible = "mmio-sram";
493 #address-cells = <1>;
494 #size-cells = <1>;
496 pm_sram_code: pm-code-sram@0 {
497 compatible = "ti,sram";
499 protect-exec;
502 pm_sram_data: pm-data-sram@1000 {
503 compatible = "ti,sram";
510 target-module@4c000000 {
511 compatible = "ti,sysc-omap4-simple", "ti,sysc";
513 reg-names = "rev";
515 clock-names = "fck";
516 ti,no-idle;
517 #address-cells = <1>;
518 #size-cells = <1>;
522 compatible = "ti,emif-am3352";
525 sram = <&pm_sram_code
530 target-module@50000000 {
531 compatible = "ti,sysc-omap2", "ti,sysc";
535 reg-names = "rev", "sysc", "syss";
536 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
539 ti,syss-mask = <1>;
541 clock-names = "fck";
542 #address-cells = <1>;
543 #size-cells = <1>;
548 compatible = "ti,am3352-gpmc";
552 dma-names = "rxtx";
553 gpmc,num-cs = <7>;
554 gpmc,num-waitpins = <2>;
555 #address-cells = <2>;
556 #size-cells = <1>;
557 interrupt-controller;
558 #interrupt-cells = <2>;
559 gpio-controller;
560 #gpio-cells = <2>;
565 sham_target: target-module@53100000 {
566 compatible = "ti,sysc-omap3-sham", "ti,sysc";
570 reg-names = "rev", "sysc", "syss";
571 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
573 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
576 ti,syss-mask = <1>;
579 clock-names = "fck";
580 #address-cells = <1>;
581 #size-cells = <1>;
585 compatible = "ti,omap4-sham";
589 dma-names = "rx";
593 aes_target: target-module@53500000 {
594 compatible = "ti,sysc-omap2", "ti,sysc";
598 reg-names = "rev", "sysc", "syss";
599 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
601 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
605 ti,syss-mask = <1>;
608 clock-names = "fck";
609 #address-cells = <1>;
610 #size-cells = <1>;
614 compatible = "ti,omap4-aes";
619 dma-names = "tx", "rx";
623 target-module@56000000 {
624 compatible = "ti,sysc-omap4", "ti,sysc";
627 reg-names = "rev", "sysc";
628 ti,sysc-midle = <SYSC_IDLE_FORCE>,
631 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
635 clock-names = "fck";
636 power-domains = <&prm_gfx>;
638 reset-names = "rstctrl";
639 #address-cells = <1>;
640 #size-cells = <1>;
644 compatible = "ti,omap3630-gpu", "img,powervr-sgx530";
652 #include "am33xx-l4.dtsi"
653 #include "am33xx-clocks.dtsi"
657 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
659 #reset-cells = <1>;
660 #power-domain-cells = <0>;
664 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
666 #reset-cells = <1>;
667 #power-domain-cells = <0>;
671 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
673 #power-domain-cells = <0>;
677 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
679 #reset-cells = <1>;
683 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
685 #power-domain-cells = <0>;
689 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
691 #power-domain-cells = <0>;
692 #reset-cells = <1>;
696 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
698 #power-domain-cells = <0>;
702 /* Preferred always-on timer for clocksource */
706 clock-names = "fck", "ick";
707 ti,no-reset-on-init;
708 ti,no-idle;
710 assigned-clocks = <&timer1_fck>;
711 assigned-clock-parents = <&sys_clkin_ck>;
719 clock-names = "fck", "ick";
720 ti,no-reset-on-init;
721 ti,no-idle;
723 assigned-clocks = <&timer2_fck>;
724 assigned-clock-parents = <&sys_clkin_ck>;