Lines Matching full:names

13 		clock-output-names = "arm-pll-clk";
15 		reg-names = "control";
23 		reg-names = "control", "multiplier", "post-divider";
30 		clock-output-names = "papllclk";
32 		reg-names = "control";
39 		clock-output-names = "ddr-3a-pll-clk";
41 		reg-names = "control";
48 		clock-output-names = "dfe";
49 		reg-names = "control", "domain";
58 		clock-output-names = "pcie";
60 		reg-names = "control", "domain";
68 		clock-output-names = "gem1";
70 		reg-names = "control", "domain";
78 		clock-output-names = "gem2";
80 		reg-names = "control", "domain";
88 		clock-output-names = "gem3";
90 		reg-names = "control", "domain";
98 		clock-output-names = "tac";
100 		reg-names = "control", "domain";
108 		clock-output-names = "rac";
110 		reg-names = "control", "domain";
118 		clock-output-names = "dfe-pd0";
120 		reg-names = "control", "domain";
128 		clock-output-names = "fftc-0";
130 		reg-names = "control", "domain";
138 		clock-output-names = "osr";
140 		reg-names = "control", "domain";
148 		clock-output-names = "tcp3d-0";
150 		reg-names = "control", "domain";
158 		clock-output-names = "tcp3d-1";
160 		reg-names = "control", "domain";
168 		clock-output-names = "vcp-0";
170 		reg-names = "control", "domain";
178 		clock-output-names = "vcp-1";
180 		reg-names = "control", "domain";
188 		clock-output-names = "vcp-2";
190 		reg-names = "control", "domain";
198 		clock-output-names = "vcp-3";
200 		reg-names = "control", "domain";
208 		clock-output-names = "bcp";
210 		reg-names = "control", "domain";
218 		clock-output-names = "dfe-pd1";
220 		reg-names = "control", "domain";
228 		clock-output-names = "fftc-1";
230 		reg-names = "control", "domain";
238 		clock-output-names = "iqn-ail";
240 		reg-names = "control", "domain";
248 		clock-output-names = "uart2";
250 		reg-names = "control", "domain";
258 		clock-output-names = "uart3";
260 		reg-names = "control", "domain";