Lines Matching +full:0 +full:x400
10 #clock-cells = <0>;
14 reg = <0x02620370 4>;
19 #clock-cells = <0>;
22 reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
27 #clock-cells = <0>;
31 reg = <0x02620358 4>;
36 #clock-cells = <0>;
40 reg = <0x02620360 4>;
45 #clock-cells = <0>;
50 reg = <0x02350004 0xb00>, <0x02350000 0x400>;
51 domain-id = <0>;
55 #clock-cells = <0>;
59 reg = <0x0235002c 0xb00>, <0x02350000 0x400>;
65 #clock-cells = <0>;
69 reg = <0x02350040 0xb00>, <0x02350024 0x400>;
75 #clock-cells = <0>;
79 reg = <0x02350044 0xb00>, <0x02350028 0x400>;
85 #clock-cells = <0>;
89 reg = <0x02350048 0xb00>, <0x0235002c 0x400>;
95 #clock-cells = <0>;
99 reg = <0x02350064 0xb00>, <0x02350044 0x400>;
105 #clock-cells = <0>;
109 reg = <0x02350068 0xb00>, <0x02350044 0x400>;
115 #clock-cells = <0>;
119 reg = <0x0235006c 0xb00>, <0x02350044 0x400>;
125 #clock-cells = <0>;
128 clock-output-names = "fftc-0";
129 reg = <0x02350070 0xb00>, <0x0235004c 0x400>;
135 #clock-cells = <0>;
139 reg = <0x02350088 0xb00>, <0x0235004c 0x400>;
145 #clock-cells = <0>;
148 clock-output-names = "tcp3d-0";
149 reg = <0x0235008c 0xb00>, <0x02350058 0x400>;
155 #clock-cells = <0>;
159 reg = <0x02350094 0xb00>, <0x02350058 0x400>;
165 #clock-cells = <0>;
168 clock-output-names = "vcp-0";
169 reg = <0x0235009c 0xb00>, <0x02350060 0x400>;
175 #clock-cells = <0>;
179 reg = <0x023500a0 0xb00>, <0x02350060 0x400>;
185 #clock-cells = <0>;
189 reg = <0x023500a4 0xb00>, <0x02350060 0x400>;
195 #clock-cells = <0>;
199 reg = <0x023500a8 0xb00>, <0x02350060 0x400>;
205 #clock-cells = <0>;
209 reg = <0x023500bc 0xb00>, <0x02350068 0x400>;
215 #clock-cells = <0>;
219 reg = <0x023500c0 0xb00>, <0x02350044 0x400>;
225 #clock-cells = <0>;
229 reg = <0x023500c4 0xb00>, <0x023504c0 0x400>;
235 #clock-cells = <0>;
239 reg = <0x023500c8 0xb00>, <0x0235004c 0x400>;
245 #clock-cells = <0>;
249 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
251 domain-id = <0>;
255 #clock-cells = <0>;
259 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
261 domain-id = <0>;