Lines Matching +full:gic +full:- +full:timer
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
6 #include <dt-bindings/clock/berlin2q.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 model = "Marvell Armada 1500 pro (BG2-Q) SoC";
12 #address-cells = <1>;
13 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
23 enable-method = "marvell,berlin-smp";
26 compatible = "arm,cortex-a9";
28 next-level-cache = <&l2>;
32 clock-latency = <100000>;
34 operating-points = <
44 compatible = "arm,cortex-a9";
46 next-level-cache = <&l2>;
50 clock-latency = <100000>;
52 operating-points = <
62 compatible = "arm,cortex-a9";
64 next-level-cache = <&l2>;
68 clock-latency = <100000>;
70 operating-points = <
80 compatible = "arm,cortex-a9";
82 next-level-cache = <&l2>;
86 clock-latency = <100000>;
88 operating-points = <
99 compatible = "arm,cortex-a9-pmu";
100 interrupt-parent = <&gic>;
105 interrupt-affinity = <&cpu0>,
112 compatible = "fixed-clock";
113 #clock-cells = <0>;
114 clock-frequency = <25000000>;
118 compatible = "simple-bus";
119 #address-cells = <1>;
120 #size-cells = <1>;
123 interrupt-parent = <&gic>;
126 compatible = "mrvl,pxav3-mmc";
129 clock-names = "io", "core";
135 compatible = "mrvl,pxav3-mmc";
138 clock-names = "io", "core";
144 compatible = "mrvl,pxav3-mmc";
148 clock-names = "io", "core";
152 l2: cache-controller@ac0000 {
153 compatible = "arm,pl310-cache";
155 cache-unified;
156 cache-level = <2>;
157 arm,data-latency = <2 2 2>;
158 arm,tag-latency = <2 2 2>;
161 scu: snoop-control-unit@ad0000 {
162 compatible = "arm,cortex-a9-scu";
166 local-timer@ad0600 {
167 compatible = "arm,cortex-a9-twd-timer";
173 gic: interrupt-controller@ad1000 { label
174 compatible = "arm,cortex-a9-gic";
176 interrupt-controller;
177 #interrupt-cells = <3>;
181 compatible = "marvell,berlin2cd-usb-phy";
183 #phy-cells = <0>;
194 phy-names = "usb-phy";
199 compatible = "marvell,berlin2cd-usb-phy";
201 #phy-cells = <0>;
207 compatible = "marvell,berlin2cd-usb-phy";
209 #phy-cells = <0>;
215 compatible = "marvell,pxa168-eth";
220 local-mac-address = [00 00 00 00 00 00];
221 #address-cells = <1>;
222 #size-cells = <0>;
223 phy-connection-type = "mii";
224 phy-handle = <ðphy0>;
227 ethphy0: ethernet-phy@0 {
232 cpu-ctrl@dd0000 {
233 compatible = "marvell,berlin-cpu-ctrl";
238 compatible = "simple-bus";
239 #address-cells = <1>;
240 #size-cells = <1>;
243 interrupt-parent = <&aic>;
246 compatible = "snps,dw-apb-gpio";
248 #address-cells = <1>;
249 #size-cells = <0>;
251 porta: gpio-port@0 {
252 compatible = "snps,dw-apb-gpio-port";
253 gpio-controller;
254 #gpio-cells = <2>;
257 interrupt-controller;
258 #interrupt-cells = <2>;
264 compatible = "snps,dw-apb-gpio";
266 #address-cells = <1>;
267 #size-cells = <0>;
269 portb: gpio-port@1 {
270 compatible = "snps,dw-apb-gpio-port";
271 gpio-controller;
272 #gpio-cells = <2>;
275 interrupt-controller;
276 #interrupt-cells = <2>;
282 compatible = "snps,dw-apb-gpio";
284 #address-cells = <1>;
285 #size-cells = <0>;
287 portc: gpio-port@2 {
288 compatible = "snps,dw-apb-gpio-port";
289 gpio-controller;
290 #gpio-cells = <2>;
293 interrupt-controller;
294 #interrupt-cells = <2>;
300 compatible = "snps,dw-apb-gpio";
302 #address-cells = <1>;
303 #size-cells = <0>;
305 portd: gpio-port@3 {
306 compatible = "snps,dw-apb-gpio-port";
307 gpio-controller;
308 #gpio-cells = <2>;
311 interrupt-controller;
312 #interrupt-cells = <2>;
318 compatible = "snps,designware-i2c";
319 #address-cells = <1>;
320 #size-cells = <0>;
324 pinctrl-0 = <&twsi0_pmux>;
325 pinctrl-names = "default";
330 compatible = "snps,designware-i2c";
331 #address-cells = <1>;
332 #size-cells = <0>;
336 pinctrl-0 = <&twsi1_pmux>;
337 pinctrl-names = "default";
341 timer0: timer@2c00 {
342 compatible = "snps,dw-apb-timer";
345 clock-names = "timer";
349 timer1: timer@2c14 {
350 compatible = "snps,dw-apb-timer";
353 clock-names = "timer";
356 timer2: timer@2c28 {
357 compatible = "snps,dw-apb-timer";
360 clock-names = "timer";
364 timer3: timer@2c3c {
365 compatible = "snps,dw-apb-timer";
368 clock-names = "timer";
372 timer4: timer@2c50 {
373 compatible = "snps,dw-apb-timer";
376 clock-names = "timer";
380 timer5: timer@2c64 {
381 compatible = "snps,dw-apb-timer";
384 clock-names = "timer";
388 timer6: timer@2c78 {
389 compatible = "snps,dw-apb-timer";
392 clock-names = "timer";
396 timer7: timer@2c8c {
397 compatible = "snps,dw-apb-timer";
400 clock-names = "timer";
404 aic: interrupt-controller@3800 {
405 compatible = "snps,dw-apb-ictl";
407 interrupt-controller;
408 #interrupt-cells = <1>;
409 interrupt-parent = <&gic>;
414 chip: chip-control@ea0000 {
415 compatible = "simple-mfd", "syscon";
419 compatible = "marvell,berlin2q-clk";
420 #clock-cells = <1>;
422 clock-names = "refclk";
425 soc_pinctrl: pin-controller {
426 compatible = "marvell,berlin2q-soc-pinctrl";
428 sd1_pmux: sd1-pmux {
433 twsi0_pmux: twsi0-pmux {
438 twsi1_pmux: twsi1-pmux {
445 compatible = "marvell,berlin2-reset";
446 #reset-cells = <2>;
451 compatible = "marvell,berlin2q-ahci", "generic-ahci";
455 #address-cells = <1>;
456 #size-cells = <0>;
458 sata0: sata-port@0 {
464 sata1: sata-port@1 {
472 compatible = "marvell,berlin2q-sata-phy";
475 #address-cells = <1>;
476 #size-cells = <0>;
477 #phy-cells = <1>;
480 sata-phy@0 {
484 sata-phy@1 {
495 phy-names = "usb-phy";
505 phy-names = "usb-phy";
510 compatible = "marvell,berlin-pwm";
513 #pwm-cells = <3>;
517 compatible = "simple-bus";
518 #address-cells = <1>;
519 #size-cells = <1>;
522 interrupt-parent = <&sic>;
525 compatible = "snps,dw-wdt";
532 compatible = "snps,dw-wdt";
539 compatible = "snps,dw-wdt";
546 compatible = "snps,dw-apb-gpio";
548 #address-cells = <1>;
549 #size-cells = <0>;
551 portf: gpio-port@5 {
552 compatible = "snps,dw-apb-gpio-port";
553 gpio-controller;
554 #gpio-cells = <2>;
561 compatible = "snps,designware-i2c";
562 #address-cells = <1>;
563 #size-cells = <0>;
567 pinctrl-0 = <&twsi2_pmux>;
568 pinctrl-names = "default";
573 compatible = "snps,designware-i2c";
574 #address-cells = <1>;
575 #size-cells = <0>;
579 pinctrl-0 = <&twsi3_pmux>;
580 pinctrl-names = "default";
585 compatible = "snps,dw-apb-uart";
589 reg-shift = <2>;
590 pinctrl-0 = <&uart0_pmux>;
591 pinctrl-names = "default";
596 compatible = "snps,dw-apb-uart";
600 reg-shift = <2>;
601 pinctrl-0 = <&uart1_pmux>;
602 pinctrl-names = "default";
607 compatible = "snps,dw-apb-gpio";
609 #address-cells = <1>;
610 #size-cells = <0>;
612 porte: gpio-port@4 {
613 compatible = "snps,dw-apb-gpio-port";
614 gpio-controller;
615 #gpio-cells = <2>;
621 sysctrl: pin-controller@d000 {
622 compatible = "simple-mfd", "syscon";
625 sys_pinctrl: pin-controller {
626 compatible = "marvell,berlin2q-system-pinctrl";
628 uart0_pmux: uart0-pmux {
633 uart1_pmux: uart1-pmux {
638 twsi2_pmux: twsi2-pmux {
643 twsi3_pmux: twsi3-pmux {
650 compatible = "marvell,berlin2-adc";
652 interrupt-names = "adc", "tsen";
656 sic: interrupt-controller@e000 {
657 compatible = "snps,dw-apb-ictl";
659 interrupt-controller;
660 #interrupt-cells = <1>;
661 interrupt-parent = <&gic>;