Lines Matching +full:phy +full:- +full:reset +full:- +full:gpios
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp151a-prtt1l.dtsi"
14 clock_ksz9031: clock-ksz9031 {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <25000000>;
20 clock_sja1105: clock-sja1105 {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <25000000>;
26 pse_t1l1: ethernet-pse-1 {
27 compatible = "podl-pse-regulator";
28 pse-supply = <®_t1l1>;
29 #pse-cells = <0>;
32 pse_t1l2: ethernet-pse-2 {
33 compatible = "podl-pse-regulator";
34 pse-supply = <®_t1l2>;
35 #pse-cells = <0>;
39 compatible = "virtual,mdio-gpio";
40 #address-cells = <1>;
41 #size-cells = <0>;
42 gpios = <&gpioc 1 GPIO_ACTIVE_HIGH
47 reg_t1l1: regulator-pse-t1l1 {
48 compatible = "regulator-fixed";
49 regulator-name = "pse-t1l1";
50 regulator-min-microvolt = <12000000>;
51 regulator-max-microvolt = <12000000>;
53 enable-active-high;
56 reg_t1l2: regulator-pse-t1l2 {
57 compatible = "regulator-fixed";
58 regulator-name = "pse-t1l2";
59 regulator-min-microvolt = <12000000>;
60 regulator-max-microvolt = <12000000>;
62 enable-active-high;
65 wifi_pwrseq: wifi-pwrseq {
66 compatible = "mmc-pwrseq-simple";
67 reset-gpios = <&gpiod 8 GPIO_ACTIVE_LOW>;
72 fixed-link {
74 full-duplex;
79 gpio-line-names =
85 gpio-line-names =
91 gpio-line-names =
97 gpio-line-names =
108 t1l0_phy: ethernet-phy@6 {
109 compatible = "ethernet-phy-id2000.0181";
111 interrupts-extended = <&gpioa 4 IRQ_TYPE_LEVEL_LOW>;
112 reset-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>;
113 reset-assert-us = <10>;
114 reset-deassert-us = <35>;
118 t1l1_phy: ethernet-phy@7 {
119 compatible = "ethernet-phy-id2000.0181";
121 interrupts-extended = <&gpiog 8 IRQ_TYPE_LEVEL_LOW>;
122 reset-gpios = <&gpiog 12 GPIO_ACTIVE_LOW>;
123 reset-assert-us = <10>;
124 reset-deassert-us = <35>;
129 t1l2_phy: ethernet-phy@10 {
130 compatible = "ethernet-phy-id2000.0181";
132 interrupts-extended = <&gpiog 10 IRQ_TYPE_LEVEL_LOW>;
133 reset-gpios = <&gpiog 11 GPIO_ACTIVE_LOW>;
134 reset-assert-us = <10>;
135 reset-deassert-us = <35>;
140 rj45_phy: ethernet-phy@2 {
142 interrupts-extended = <&gpiog 7 IRQ_TYPE_LEVEL_LOW>;
143 reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
144 reset-assert-us = <10000>;
145 reset-deassert-us = <1000>;
156 pinctrl-names = "default", "opendrain", "sleep";
157 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
158 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
159 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
160 non-removable;
161 no-sd;
162 no-sdio;
163 no-1-8-v;
164 st,neg-edge;
165 bus-width = <8>;
166 vmmc-supply = <®_3v3>;
167 vqmmc-supply = <®_3v3>;
210 pinctrl-names = "default", "opendrain", "sleep";
211 pinctrl-0 = <&sdmmc3_b4_pins_b>;
212 pinctrl-1 = <&sdmmc3_b4_od_pins_b>;
213 pinctrl-2 = <&sdmmc3_b4_sleep_pins_b>;
214 non-removable;
215 no-1-8-v;
216 st,neg-edge;
217 bus-width = <4>;
218 vmmc-supply = <®_3v3>;
219 vqmmc-supply = <®_3v3>;
220 mmc-pwrseq = <&wifi_pwrseq>;
221 #address-cells = <1>;
222 #size-cells = <0>;
226 compatible = "prt,prtt1c-wfm200", "silabs,wf200";
256 pinctrl-0 = <&spi1_pins_b>;
257 pinctrl-names = "default";
258 cs-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
259 /delete-property/dmas;
260 /delete-property/dma-names;
266 spi-max-frequency = <4000000>;
267 spi-rx-delay-us = <1>;
268 spi-tx-delay-us = <1>;
269 spi-cpha;
271 reset-gpios = <&gpioe 6 GPIO_ACTIVE_LOW>;
276 #address-cells = <1>;
277 #size-cells = <0>;
282 phy-mode = "rmii";
283 phy-handle = <&t1l0_phy>;
289 phy-mode = "rmii";
290 phy-handle = <&t1l1_phy>;
296 phy-mode = "rmii";
297 phy-handle = <&t1l2_phy>;
303 phy-handle = <&rj45_phy>;
304 phy-mode = "rgmii-id";
311 phy-mode = "rmii";
313 fixed-link {
315 full-duplex;