Lines Matching +full:stm32mp157 +full:- +full:syscfg
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
20 clock-frequency = <650000000>;
26 arm-pmu {
27 compatible = "arm,cortex-a7-pmu";
29 interrupt-affinity = <&cpu0>;
30 interrupt-parent = <&intc>;
34 compatible = "arm,psci-1.0";
38 intc: interrupt-controller@a0021000 {
39 compatible = "arm,cortex-a7-gic";
40 #interrupt-cells = <3>;
41 interrupt-controller;
47 compatible = "arm,armv7-timer";
52 interrupt-parent = <&intc>;
53 arm,no-tick-in-suspend;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
59 compatible = "fixed-clock";
60 clock-frequency = <24000000>;
63 clk_hsi: clk-hsi {
64 #clock-cells = <0>;
65 compatible = "fixed-clock";
66 clock-frequency = <64000000>;
69 clk_lse: clk-lse {
70 #clock-cells = <0>;
71 compatible = "fixed-clock";
72 clock-frequency = <32768>;
75 clk_lsi: clk-lsi {
76 #clock-cells = <0>;
77 compatible = "fixed-clock";
78 clock-frequency = <32000>;
81 clk_csi: clk-csi {
82 #clock-cells = <0>;
83 compatible = "fixed-clock";
84 clock-frequency = <4000000>;
88 thermal-zones {
89 cpu_thermal: cpu-thermal {
90 polling-delay-passive = <0>;
91 polling-delay = <0>;
92 thermal-sensors = <&dts>;
95 cpu_alert1: cpu-alert1 {
101 cpu-crit {
108 cooling-maps {
113 booster: regulator-booster {
114 compatible = "st,stm32mp1-booster";
115 st,syscfg = <&syscfg>;
120 compatible = "simple-bus";
121 #address-cells = <1>;
122 #size-cells = <1>;
123 interrupt-parent = <&intc>;
127 compatible = "st,stm32mp1-ipcc";
128 #mbox-cells = <1>;
130 st,proc-id = <0>;
131 interrupts-extended =
134 interrupt-names = "rx", "tx";
136 wakeup-source;
141 compatible = "st,stm32mp1-rcc", "syscon";
143 #clock-cells = <1>;
144 #reset-cells = <1>;
148 compatible = "st,stm32mp1,pwr-reg";
152 regulator-name = "reg11";
153 regulator-min-microvolt = <1100000>;
154 regulator-max-microvolt = <1100000>;
158 regulator-name = "reg18";
159 regulator-min-microvolt = <1800000>;
160 regulator-max-microvolt = <1800000>;
164 regulator-name = "usb33";
165 regulator-min-microvolt = <3300000>;
166 regulator-max-microvolt = <3300000>;
171 compatible = "st,stm32mp151-pwr-mcu", "syscon";
175 exti: interrupt-controller@5000d000 {
176 compatible = "st,stm32mp1-exti", "syscon";
177 interrupt-controller;
178 #interrupt-cells = <2>;
180 interrupts-extended =
257 syscfg: syscon@50020000 { label
258 compatible = "st,stm32mp157-syscfg", "syscon";
260 clocks = <&rcc SYSCFG>;
264 compatible = "st,stm32-thermal";
268 clock-names = "pclk";
269 #thermal-sensor-cells = <0>;
273 mdma1: dma-controller@58000000 {
274 compatible = "st,stm32h7-mdma";
279 #dma-cells = <5>;
280 dma-channels = <32>;
281 dma-requests = <48>;
285 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
286 arm,primecell-periphid = <0x00253180>;
290 clock-names = "apb_pclk";
292 cap-sd-highspeed;
293 cap-mmc-highspeed;
294 max-frequency = <120000000>;
299 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
300 arm,primecell-periphid = <0x00253180>;
304 clock-names = "apb_pclk";
306 cap-sd-highspeed;
307 cap-mmc-highspeed;
308 max-frequency = <120000000>;
313 compatible = "st,stm32f7-crc";
320 compatible = "generic-ohci";
326 phy-names = "usb";
331 compatible = "generic-ehci";
338 phy-names = "usb";
342 ltdc: display-controller@5a001000 {
343 compatible = "st,stm32-ltdc";
348 clock-names = "lcd";
354 compatible = "st,stm32mp1-iwdg";
357 clock-names = "pclk", "lsi";
362 #address-cells = <1>;
363 #size-cells = <0>;
364 #clock-cells = <0>;
365 compatible = "st,stm32mp1-usbphyc";
369 vdda1v1-supply = <®11>;
370 vdda1v8-supply = <®18>;
373 usbphyc_port0: usb-phy@0 {
374 #phy-cells = <0>;
378 usbphyc_port1: usb-phy@1 {
379 #phy-cells = <1>;
385 compatible = "st,stm32mp1-rtc";
388 clock-names = "pclk", "rtc_ck";
389 interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
394 compatible = "st,stm32mp15-bsec";
396 #address-cells = <1>;
397 #size-cells = <1>;
398 part_number_otp: part-number-otp@4 {
401 vrefint: vrefin-cal@52 {
413 compatible = "st,stm32-etzpc", "simple-bus";
415 #address-cells = <1>;
416 #size-cells = <1>;
417 #access-controller-cells = <1>;
421 #address-cells = <1>;
422 #size-cells = <0>;
423 compatible = "st,stm32-timers";
426 interrupt-names = "global";
428 clock-names = "int";
434 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
435 access-controllers = <&etzpc 16>;
439 compatible = "st,stm32-pwm";
440 #pwm-cells = <3>;
445 compatible = "st,stm32h7-timer-trigger";
451 compatible = "st,stm32-timer-counter";
457 #address-cells = <1>;
458 #size-cells = <0>;
459 compatible = "st,stm32-timers";
462 interrupt-names = "global";
464 clock-names = "int";
471 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
472 access-controllers = <&etzpc 17>;
476 compatible = "st,stm32-pwm";
477 #pwm-cells = <3>;
482 compatible = "st,stm32h7-timer-trigger";
488 compatible = "st,stm32-timer-counter";
494 #address-cells = <1>;
495 #size-cells = <0>;
496 compatible = "st,stm32-timers";
499 interrupt-names = "global";
501 clock-names = "int";
506 dma-names = "ch1", "ch2", "ch3", "ch4";
507 access-controllers = <&etzpc 18>;
511 compatible = "st,stm32-pwm";
512 #pwm-cells = <3>;
517 compatible = "st,stm32h7-timer-trigger";
523 compatible = "st,stm32-timer-counter";
529 #address-cells = <1>;
530 #size-cells = <0>;
531 compatible = "st,stm32-timers";
534 interrupt-names = "global";
536 clock-names = "int";
543 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
544 access-controllers = <&etzpc 19>;
548 compatible = "st,stm32-pwm";
549 #pwm-cells = <3>;
554 compatible = "st,stm32h7-timer-trigger";
560 compatible = "st,stm32-timer-counter";
566 #address-cells = <1>;
567 #size-cells = <0>;
568 compatible = "st,stm32-timers";
571 interrupt-names = "global";
573 clock-names = "int";
575 dma-names = "up";
576 access-controllers = <&etzpc 20>;
580 compatible = "st,stm32h7-timer-trigger";
587 #address-cells = <1>;
588 #size-cells = <0>;
589 compatible = "st,stm32-timers";
592 interrupt-names = "global";
594 clock-names = "int";
596 dma-names = "up";
597 access-controllers = <&etzpc 21>;
601 compatible = "st,stm32h7-timer-trigger";
608 #address-cells = <1>;
609 #size-cells = <0>;
610 compatible = "st,stm32-timers";
613 interrupt-names = "global";
615 clock-names = "int";
616 access-controllers = <&etzpc 22>;
620 compatible = "st,stm32-pwm";
621 #pwm-cells = <3>;
626 compatible = "st,stm32h7-timer-trigger";
633 #address-cells = <1>;
634 #size-cells = <0>;
635 compatible = "st,stm32-timers";
638 interrupt-names = "global";
640 clock-names = "int";
641 access-controllers = <&etzpc 23>;
645 compatible = "st,stm32-pwm";
646 #pwm-cells = <3>;
651 compatible = "st,stm32h7-timer-trigger";
658 #address-cells = <1>;
659 #size-cells = <0>;
660 compatible = "st,stm32-timers";
663 interrupt-names = "global";
665 clock-names = "int";
666 access-controllers = <&etzpc 24>;
670 compatible = "st,stm32-pwm";
671 #pwm-cells = <3>;
676 compatible = "st,stm32h7-timer-trigger";
683 #address-cells = <1>;
684 #size-cells = <0>;
685 compatible = "st,stm32-lptimer";
687 interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
689 clock-names = "mux";
690 wakeup-source;
691 access-controllers = <&etzpc 25>;
695 compatible = "st,stm32-pwm-lp";
696 #pwm-cells = <3>;
701 compatible = "st,stm32-lptimer-trigger";
707 compatible = "st,stm32-lptimer-counter";
712 i2s2: audio-controller@4000b000 {
713 compatible = "st,stm32h7-i2s";
714 #sound-dai-cells = <0>;
719 dma-names = "rx", "tx";
720 access-controllers = <&etzpc 27>;
725 #address-cells = <1>;
726 #size-cells = <0>;
727 compatible = "st,stm32h7-spi";
734 dma-names = "rx", "tx";
735 access-controllers = <&etzpc 27>;
739 i2s3: audio-controller@4000c000 {
740 compatible = "st,stm32h7-i2s";
741 #sound-dai-cells = <0>;
746 dma-names = "rx", "tx";
747 access-controllers = <&etzpc 28>;
752 #address-cells = <1>;
753 #size-cells = <0>;
754 compatible = "st,stm32h7-spi";
761 dma-names = "rx", "tx";
762 access-controllers = <&etzpc 28>;
766 spdifrx: audio-controller@4000d000 {
767 compatible = "st,stm32h7-spdifrx";
768 #sound-dai-cells = <0>;
771 clock-names = "kclk";
775 dma-names = "rx", "rx-ctrl";
776 access-controllers = <&etzpc 29>;
781 compatible = "st,stm32h7-uart";
783 interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
785 wakeup-source;
788 dma-names = "rx", "tx";
789 access-controllers = <&etzpc 30>;
794 compatible = "st,stm32h7-uart";
796 interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
798 wakeup-source;
801 dma-names = "rx", "tx";
802 access-controllers = <&etzpc 31>;
807 compatible = "st,stm32h7-uart";
809 interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
811 wakeup-source;
814 dma-names = "rx", "tx";
815 access-controllers = <&etzpc 32>;
820 compatible = "st,stm32h7-uart";
822 interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
824 wakeup-source;
827 dma-names = "rx", "tx";
828 access-controllers = <&etzpc 33>;
833 compatible = "st,stm32mp15-i2c";
835 interrupt-names = "event", "error";
840 #address-cells = <1>;
841 #size-cells = <0>;
842 st,syscfg-fmp = <&syscfg 0x4 0x1>;
843 wakeup-source;
844 i2c-analog-filter;
845 access-controllers = <&etzpc 34>;
850 compatible = "st,stm32mp15-i2c";
852 interrupt-names = "event", "error";
857 #address-cells = <1>;
858 #size-cells = <0>;
859 st,syscfg-fmp = <&syscfg 0x4 0x2>;
860 wakeup-source;
861 i2c-analog-filter;
862 access-controllers = <&etzpc 35>;
867 compatible = "st,stm32mp15-i2c";
869 interrupt-names = "event", "error";
874 #address-cells = <1>;
875 #size-cells = <0>;
876 st,syscfg-fmp = <&syscfg 0x4 0x4>;
877 wakeup-source;
878 i2c-analog-filter;
879 access-controllers = <&etzpc 36>;
884 compatible = "st,stm32mp15-i2c";
886 interrupt-names = "event", "error";
891 #address-cells = <1>;
892 #size-cells = <0>;
893 st,syscfg-fmp = <&syscfg 0x4 0x10>;
894 wakeup-source;
895 i2c-analog-filter;
896 access-controllers = <&etzpc 37>;
901 compatible = "st,stm32-cec";
905 clock-names = "cec", "hdmi-cec";
906 access-controllers = <&etzpc 38>;
911 compatible = "st,stm32h7-dac-core";
914 clock-names = "pclk";
915 #address-cells = <1>;
916 #size-cells = <0>;
917 access-controllers = <&etzpc 39>;
921 compatible = "st,stm32-dac";
922 #io-channel-cells = <1>;
928 compatible = "st,stm32-dac";
929 #io-channel-cells = <1>;
936 compatible = "st,stm32h7-uart";
938 interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
940 wakeup-source;
943 dma-names = "rx", "tx";
944 access-controllers = <&etzpc 40>;
949 compatible = "st,stm32h7-uart";
951 interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
953 wakeup-source;
956 dma-names = "rx", "tx";
957 access-controllers = <&etzpc 41>;
962 #address-cells = <1>;
963 #size-cells = <0>;
964 compatible = "st,stm32-timers";
970 interrupt-names = "brk", "up", "trg-com", "cc";
972 clock-names = "int";
980 dma-names = "ch1", "ch2", "ch3", "ch4",
982 access-controllers = <&etzpc 48>;
986 compatible = "st,stm32-pwm";
987 #pwm-cells = <3>;
992 compatible = "st,stm32h7-timer-trigger";
998 compatible = "st,stm32-timer-counter";
1004 #address-cells = <1>;
1005 #size-cells = <0>;
1006 compatible = "st,stm32-timers";
1012 interrupt-names = "brk", "up", "trg-com", "cc";
1014 clock-names = "int";
1022 dma-names = "ch1", "ch2", "ch3", "ch4",
1024 access-controllers = <&etzpc 49>;
1028 compatible = "st,stm32-pwm";
1029 #pwm-cells = <3>;
1034 compatible = "st,stm32h7-timer-trigger";
1040 compatible = "st,stm32-timer-counter";
1046 compatible = "st,stm32h7-uart";
1048 interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
1050 wakeup-source;
1053 dma-names = "rx", "tx";
1054 access-controllers = <&etzpc 51>;
1058 i2s1: audio-controller@44004000 {
1059 compatible = "st,stm32h7-i2s";
1060 #sound-dai-cells = <0>;
1065 dma-names = "rx", "tx";
1066 access-controllers = <&etzpc 52>;
1071 #address-cells = <1>;
1072 #size-cells = <0>;
1073 compatible = "st,stm32h7-spi";
1080 dma-names = "rx", "tx";
1081 access-controllers = <&etzpc 52>;
1086 #address-cells = <1>;
1087 #size-cells = <0>;
1088 compatible = "st,stm32h7-spi";
1095 dma-names = "rx", "tx";
1096 access-controllers = <&etzpc 53>;
1101 #address-cells = <1>;
1102 #size-cells = <0>;
1103 compatible = "st,stm32-timers";
1106 interrupt-names = "global";
1108 clock-names = "int";
1113 dma-names = "ch1", "up", "trig", "com";
1114 access-controllers = <&etzpc 54>;
1118 compatible = "st,stm32-pwm";
1119 #pwm-cells = <3>;
1124 compatible = "st,stm32h7-timer-trigger";
1131 #address-cells = <1>;
1132 #size-cells = <0>;
1133 compatible = "st,stm32-timers";
1136 interrupt-names = "global";
1138 clock-names = "int";
1141 dma-names = "ch1", "up";
1142 access-controllers = <&etzpc 55>;
1146 compatible = "st,stm32-pwm";
1147 #pwm-cells = <3>;
1151 compatible = "st,stm32h7-timer-trigger";
1158 #address-cells = <1>;
1159 #size-cells = <0>;
1160 compatible = "st,stm32-timers";
1163 interrupt-names = "global";
1165 clock-names = "int";
1168 dma-names = "ch1", "up";
1169 access-controllers = <&etzpc 56>;
1173 compatible = "st,stm32-pwm";
1174 #pwm-cells = <3>;
1179 compatible = "st,stm32h7-timer-trigger";
1186 #address-cells = <1>;
1187 #size-cells = <0>;
1188 compatible = "st,stm32h7-spi";
1195 dma-names = "rx", "tx";
1196 access-controllers = <&etzpc 57>;
1201 compatible = "st,stm32h7-sai";
1202 #address-cells = <1>;
1203 #size-cells = <1>;
1208 access-controllers = <&etzpc 58>;
1211 sai1a: audio-controller@4400a004 {
1212 #sound-dai-cells = <0>;
1214 compatible = "st,stm32-sai-sub-a";
1217 clock-names = "sai_ck";
1222 sai1b: audio-controller@4400a024 {
1223 #sound-dai-cells = <0>;
1224 compatible = "st,stm32-sai-sub-b";
1227 clock-names = "sai_ck";
1234 compatible = "st,stm32h7-sai";
1235 #address-cells = <1>;
1236 #size-cells = <1>;
1241 access-controllers = <&etzpc 59>;
1244 sai2a: audio-controller@4400b004 {
1245 #sound-dai-cells = <0>;
1246 compatible = "st,stm32-sai-sub-a";
1249 clock-names = "sai_ck";
1254 sai2b: audio-controller@4400b024 {
1255 #sound-dai-cells = <0>;
1256 compatible = "st,stm32-sai-sub-b";
1259 clock-names = "sai_ck";
1266 compatible = "st,stm32h7-sai";
1267 #address-cells = <1>;
1268 #size-cells = <1>;
1273 access-controllers = <&etzpc 60>;
1276 sai3a: audio-controller@4400c004 {
1277 #sound-dai-cells = <0>;
1278 compatible = "st,stm32-sai-sub-a";
1281 clock-names = "sai_ck";
1286 sai3b: audio-controller@4400c024 {
1287 #sound-dai-cells = <0>;
1288 compatible = "st,stm32-sai-sub-b";
1291 clock-names = "sai_ck";
1298 compatible = "st,stm32mp1-dfsdm";
1301 clock-names = "dfsdm";
1302 #address-cells = <1>;
1303 #size-cells = <0>;
1304 access-controllers = <&etzpc 61>;
1308 compatible = "st,stm32-dfsdm-adc";
1309 #io-channel-cells = <1>;
1313 dma-names = "rx";
1318 compatible = "st,stm32-dfsdm-adc";
1319 #io-channel-cells = <1>;
1323 dma-names = "rx";
1328 compatible = "st,stm32-dfsdm-adc";
1329 #io-channel-cells = <1>;
1333 dma-names = "rx";
1338 compatible = "st,stm32-dfsdm-adc";
1339 #io-channel-cells = <1>;
1343 dma-names = "rx";
1348 compatible = "st,stm32-dfsdm-adc";
1349 #io-channel-cells = <1>;
1353 dma-names = "rx";
1358 compatible = "st,stm32-dfsdm-adc";
1359 #io-channel-cells = <1>;
1363 dma-names = "rx";
1368 dma1: dma-controller@48000000 {
1369 compatible = "st,stm32-dma";
1381 #dma-cells = <4>;
1383 dma-requests = <8>;
1384 access-controllers = <&etzpc 88>;
1387 dma2: dma-controller@48001000 {
1388 compatible = "st,stm32-dma";
1400 #dma-cells = <4>;
1402 dma-requests = <8>;
1403 access-controllers = <&etzpc 89>;
1406 dmamux1: dma-router@48002000 {
1407 compatible = "st,stm32h7-dmamux";
1409 #dma-cells = <3>;
1410 dma-requests = <128>;
1411 dma-masters = <&dma1 &dma2>;
1412 dma-channels = <16>;
1415 access-controllers = <&etzpc 90>;
1419 compatible = "st,stm32mp1-adc-core";
1424 clock-names = "bus", "adc";
1425 interrupt-controller;
1426 st,syscfg = <&syscfg>;
1427 #interrupt-cells = <1>;
1428 #address-cells = <1>;
1429 #size-cells = <0>;
1430 access-controllers = <&etzpc 72>;
1434 compatible = "st,stm32mp1-adc";
1435 #io-channel-cells = <1>;
1436 #address-cells = <1>;
1437 #size-cells = <0>;
1439 interrupt-parent = <&adc>;
1442 dma-names = "rx";
1447 compatible = "st,stm32mp1-adc";
1448 #io-channel-cells = <1>;
1449 #address-cells = <1>;
1450 #size-cells = <0>;
1452 interrupt-parent = <&adc>;
1455 dma-names = "rx";
1456 nvmem-cells = <&vrefint>;
1457 nvmem-cell-names = "vrefint";
1471 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1472 arm,primecell-periphid = <0x00253180>;
1476 clock-names = "apb_pclk";
1478 cap-sd-highspeed;
1479 cap-mmc-highspeed;
1480 max-frequency = <120000000>;
1481 access-controllers = <&etzpc 86>;
1485 usbotg_hs: usb-otg@49000000 {
1486 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
1489 clock-names = "otg", "utmi";
1491 reset-names = "dwc2";
1493 g-rx-fifo-size = <512>;
1494 g-np-tx-fifo-size = <32>;
1495 g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
1497 otg-rev = <0x200>;
1498 usb33d-supply = <&usb33>;
1499 access-controllers = <&etzpc 85>;
1504 compatible = "st,stm32-dcmi";
1509 clock-names = "mclk";
1511 dma-names = "tx";
1512 access-controllers = <&etzpc 70>;
1517 #address-cells = <1>;
1518 #size-cells = <0>;
1519 compatible = "st,stm32-lptimer";
1521 interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
1523 clock-names = "mux";
1524 wakeup-source;
1525 access-controllers = <&etzpc 64>;
1529 compatible = "st,stm32-pwm-lp";
1530 #pwm-cells = <3>;
1535 compatible = "st,stm32-lptimer-trigger";
1541 compatible = "st,stm32-lptimer-counter";
1547 #address-cells = <1>;
1548 #size-cells = <0>;
1549 compatible = "st,stm32-lptimer";
1551 interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
1553 clock-names = "mux";
1554 wakeup-source;
1555 access-controllers = <&etzpc 65>;
1559 compatible = "st,stm32-pwm-lp";
1560 #pwm-cells = <3>;
1565 compatible = "st,stm32-lptimer-trigger";
1572 compatible = "st,stm32-lptimer";
1574 interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
1576 clock-names = "mux";
1577 wakeup-source;
1578 access-controllers = <&etzpc 66>;
1582 compatible = "st,stm32-pwm-lp";
1583 #pwm-cells = <3>;
1589 compatible = "st,stm32-lptimer";
1591 interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
1593 clock-names = "mux";
1594 wakeup-source;
1595 access-controllers = <&etzpc 67>;
1599 compatible = "st,stm32-pwm-lp";
1600 #pwm-cells = <3>;
1606 compatible = "st,stm32-vrefbuf";
1608 regulator-min-microvolt = <1500000>;
1609 regulator-max-microvolt = <2500000>;
1611 access-controllers = <&etzpc 69>;
1616 compatible = "st,stm32h7-sai";
1617 #address-cells = <1>;
1618 #size-cells = <1>;
1623 access-controllers = <&etzpc 68>;
1626 sai4a: audio-controller@50027004 {
1627 #sound-dai-cells = <0>;
1628 compatible = "st,stm32-sai-sub-a";
1631 clock-names = "sai_ck";
1636 sai4b: audio-controller@50027024 {
1637 #sound-dai-cells = <0>;
1638 compatible = "st,stm32-sai-sub-b";
1641 clock-names = "sai_ck";
1648 compatible = "st,stm32f756-hash";
1654 dma-names = "in";
1655 dma-maxburst = <2>;
1656 access-controllers = <&etzpc 8>;
1661 compatible = "st,stm32-rng";
1665 access-controllers = <&etzpc 7>;
1669 fmc: memory-controller@58002000 {
1670 #address-cells = <2>;
1671 #size-cells = <1>;
1672 compatible = "st,stm32mp1-fmc2-ebi";
1676 access-controllers = <&etzpc 91>;
1685 nand-controller@4,0 {
1686 #address-cells = <1>;
1687 #size-cells = <0>;
1688 compatible = "st,stm32mp1-fmc2-nfc";
1699 dma-names = "tx", "rx", "ecc";
1705 compatible = "st,stm32f469-qspi";
1707 reg-names = "qspi", "qspi_mm";
1711 dma-names = "tx", "rx";
1714 #address-cells = <1>;
1715 #size-cells = <0>;
1716 access-controllers = <&etzpc 92>;
1721 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
1723 reg-names = "stmmaceth";
1724 interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1725 interrupt-names = "macirq";
1726 clock-names = "stmmaceth",
1727 "mac-clk-tx",
1728 "mac-clk-rx",
1729 "eth-ck",
1738 st,syscon = <&syscfg 0x4>;
1739 snps,mixed-burst;
1741 snps,en-tx-lpi-clockgating;
1742 snps,axi-config = <&stmmac_axi_config_0>;
1744 access-controllers = <&etzpc 94>;
1747 stmmac_axi_config_0: stmmac-axi-config {
1755 compatible = "st,stm32h7-uart";
1757 interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
1759 wakeup-source;
1760 access-controllers = <&etzpc 3>;
1765 #address-cells = <1>;
1766 #size-cells = <0>;
1767 compatible = "st,stm32h7-spi";
1774 access-controllers = <&etzpc 4>;
1775 dma-names = "rx", "tx";
1780 compatible = "st,stm32mp15-i2c";
1782 interrupt-names = "event", "error";
1787 #address-cells = <1>;
1788 #size-cells = <0>;
1789 st,syscfg-fmp = <&syscfg 0x4 0x8>;
1790 wakeup-source;
1791 i2c-analog-filter;
1792 access-controllers = <&etzpc 5>;
1797 compatible = "st,stm32mp15-i2c";
1799 interrupt-names = "event", "error";
1804 #address-cells = <1>;
1805 #size-cells = <0>;
1806 st,syscfg-fmp = <&syscfg 0x4 0x20>;
1807 wakeup-source;
1808 i2c-analog-filter;
1809 access-controllers = <&etzpc 12>;
1815 compatible = "st,stm32-tamp", "syscon", "simple-mfd";
1824 #address-cells = <1>;
1825 #size-cells = <1>;
1826 compatible = "st,stm32mp157-pinctrl";
1828 interrupt-parent = <&exti>;
1829 st,syscfg = <&exti 0x60 0xff>;
1832 gpio-controller;
1833 #gpio-cells = <2>;
1834 interrupt-controller;
1835 #interrupt-cells = <2>;
1838 st,bank-name = "GPIOA";
1843 gpio-controller;
1844 #gpio-cells = <2>;
1845 interrupt-controller;
1846 #interrupt-cells = <2>;
1849 st,bank-name = "GPIOB";
1854 gpio-controller;
1855 #gpio-cells = <2>;
1856 interrupt-controller;
1857 #interrupt-cells = <2>;
1860 st,bank-name = "GPIOC";
1865 gpio-controller;
1866 #gpio-cells = <2>;
1867 interrupt-controller;
1868 #interrupt-cells = <2>;
1871 st,bank-name = "GPIOD";
1876 gpio-controller;
1877 #gpio-cells = <2>;
1878 interrupt-controller;
1879 #interrupt-cells = <2>;
1882 st,bank-name = "GPIOE";
1887 gpio-controller;
1888 #gpio-cells = <2>;
1889 interrupt-controller;
1890 #interrupt-cells = <2>;
1893 st,bank-name = "GPIOF";
1898 gpio-controller;
1899 #gpio-cells = <2>;
1900 interrupt-controller;
1901 #interrupt-cells = <2>;
1904 st,bank-name = "GPIOG";
1909 gpio-controller;
1910 #gpio-cells = <2>;
1911 interrupt-controller;
1912 #interrupt-cells = <2>;
1915 st,bank-name = "GPIOH";
1920 gpio-controller;
1921 #gpio-cells = <2>;
1922 interrupt-controller;
1923 #interrupt-cells = <2>;
1926 st,bank-name = "GPIOI";
1931 gpio-controller;
1932 #gpio-cells = <2>;
1933 interrupt-controller;
1934 #interrupt-cells = <2>;
1937 st,bank-name = "GPIOJ";
1942 gpio-controller;
1943 #gpio-cells = <2>;
1944 interrupt-controller;
1945 #interrupt-cells = <2>;
1948 st,bank-name = "GPIOK";
1954 #address-cells = <1>;
1955 #size-cells = <1>;
1956 compatible = "st,stm32mp157-z-pinctrl";
1958 interrupt-parent = <&exti>;
1959 st,syscfg = <&exti 0x60 0xff>;
1962 gpio-controller;
1963 #gpio-cells = <2>;
1964 interrupt-controller;
1965 #interrupt-cells = <2>;
1968 st,bank-name = "GPIOZ";
1969 st,bank-ioport = <11>;
1976 compatible = "st,mlahb", "simple-bus";
1977 #address-cells = <1>;
1978 #size-cells = <1>;
1980 dma-ranges = <0x00000000 0x38000000 0x10000>,
1985 compatible = "st,stm32mp1-m4";
1990 reset-names = "mcu_rst";
1991 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
1992 st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
1993 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
1994 st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;