Lines Matching +full:stm32h7 +full:- +full:dfsdm +full:- +full:dai
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
25 arm-pmu {
26 compatible = "arm,cortex-a7-pmu";
28 interrupt-affinity = <&cpu0>;
29 interrupt-parent = <&intc>;
35 compatible = "linaro,optee-tz";
36 interrupt-parent = <&intc>;
41 compatible = "linaro,scmi-optee";
42 #address-cells = <1>;
43 #size-cells = <0>;
44 linaro,optee-channel-id = <0>;
48 #clock-cells = <1>;
53 #reset-cells = <1>;
60 #address-cells = <1>;
61 #size-cells = <0>;
65 regulator-name = "reg11";
69 regulator-name = "reg18";
73 regulator-name = "usb33";
80 intc: interrupt-controller@a0021000 {
81 compatible = "arm,cortex-a7-gic";
82 #interrupt-cells = <3>;
83 interrupt-controller;
89 compatible = "arm,psci-1.0";
94 compatible = "arm,armv7-timer";
99 interrupt-parent = <&intc>;
100 always-on;
104 compatible = "simple-bus";
105 #address-cells = <1>;
106 #size-cells = <1>;
107 interrupt-parent = <&intc>;
111 #address-cells = <1>;
112 #size-cells = <0>;
113 compatible = "st,stm32-timers";
116 interrupt-names = "global";
118 clock-names = "int";
124 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
128 compatible = "st,stm32-pwm";
129 #pwm-cells = <3>;
134 compatible = "st,stm32h7-timer-trigger";
140 compatible = "st,stm32-timer-counter";
146 #address-cells = <1>;
147 #size-cells = <0>;
148 compatible = "st,stm32-timers";
151 interrupt-names = "global";
153 clock-names = "int";
160 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
164 compatible = "st,stm32-pwm";
165 #pwm-cells = <3>;
170 compatible = "st,stm32h7-timer-trigger";
176 compatible = "st,stm32-timer-counter";
182 #address-cells = <1>;
183 #size-cells = <0>;
184 compatible = "st,stm32-timers";
187 interrupt-names = "global";
189 clock-names = "int";
194 dma-names = "ch1", "ch2", "ch3", "up";
198 compatible = "st,stm32-pwm";
199 #pwm-cells = <3>;
204 compatible = "st,stm32h7-timer-trigger";
210 compatible = "st,stm32-timer-counter";
216 #address-cells = <1>;
217 #size-cells = <0>;
218 compatible = "st,stm32-timers";
221 interrupt-names = "global";
223 clock-names = "int";
230 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
234 compatible = "st,stm32-pwm";
235 #pwm-cells = <3>;
240 compatible = "st,stm32h7-timer-trigger";
246 compatible = "st,stm32-timer-counter";
252 #address-cells = <1>;
253 #size-cells = <0>;
254 compatible = "st,stm32-timers";
257 interrupt-names = "global";
259 clock-names = "int";
261 dma-names = "up";
265 compatible = "st,stm32h7-timer-trigger";
272 #address-cells = <1>;
273 #size-cells = <0>;
274 compatible = "st,stm32-timers";
277 interrupt-names = "global";
279 clock-names = "int";
281 dma-names = "up";
285 compatible = "st,stm32h7-timer-trigger";
292 #address-cells = <1>;
293 #size-cells = <0>;
294 compatible = "st,stm32-lptimer";
296 interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
298 clock-names = "mux";
299 wakeup-source;
303 compatible = "st,stm32-pwm-lp";
304 #pwm-cells = <3>;
309 compatible = "st,stm32-lptimer-trigger";
315 compatible = "st,stm32-lptimer-counter";
320 compatible = "st,stm32-lptimer-timer";
325 i2s2: audio-controller@4000b000 {
326 compatible = "st,stm32h7-i2s";
328 #sound-dai-cells = <0>;
332 dma-names = "rx", "tx";
337 compatible = "st,stm32h7-spi";
342 #address-cells = <1>;
343 #size-cells = <0>;
346 dma-names = "rx", "tx";
350 i2s3: audio-controller@4000c000 {
351 compatible = "st,stm32h7-i2s";
353 #sound-dai-cells = <0>;
357 dma-names = "rx", "tx";
362 compatible = "st,stm32h7-spi";
367 #address-cells = <1>;
368 #size-cells = <0>;
371 dma-names = "rx", "tx";
375 spdifrx: audio-controller@4000d000 {
376 compatible = "st,stm32h7-spdifrx";
378 #sound-dai-cells = <0>;
380 clock-names = "kclk";
384 dma-names = "rx", "rx-ctrl";
389 compatible = "st,stm32h7-uart";
391 interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
394 wakeup-source;
397 dma-names = "rx", "tx";
402 compatible = "st,stm32h7-uart";
404 interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
407 wakeup-source;
410 dma-names = "rx", "tx";
415 compatible = "st,stm32h7-uart";
417 interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
420 wakeup-source;
423 dma-names = "rx", "tx";
428 compatible = "st,stm32mp13-i2c";
430 interrupt-names = "event", "error";
435 #address-cells = <1>;
436 #size-cells = <0>;
439 dma-names = "rx", "tx";
440 st,syscfg-fmp = <&syscfg 0x4 0x1>;
441 i2c-analog-filter;
446 compatible = "st,stm32mp13-i2c";
448 interrupt-names = "event", "error";
453 #address-cells = <1>;
454 #size-cells = <0>;
457 dma-names = "rx", "tx";
458 st,syscfg-fmp = <&syscfg 0x4 0x2>;
459 i2c-analog-filter;
464 compatible = "st,stm32h7-uart";
466 interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
469 wakeup-source;
472 dma-names = "rx", "tx";
477 compatible = "st,stm32h7-uart";
479 interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
482 wakeup-source;
485 dma-names = "rx", "tx";
490 #address-cells = <1>;
491 #size-cells = <0>;
492 compatible = "st,stm32-timers";
498 interrupt-names = "brk", "up", "trg-com", "cc";
500 clock-names = "int";
508 dma-names = "ch1", "ch2", "ch3", "ch4",
513 compatible = "st,stm32-pwm";
514 #pwm-cells = <3>;
519 compatible = "st,stm32h7-timer-trigger";
525 compatible = "st,stm32-timer-counter";
531 #address-cells = <1>;
532 #size-cells = <0>;
533 compatible = "st,stm32-timers";
539 interrupt-names = "brk", "up", "trg-com", "cc";
541 clock-names = "int";
549 dma-names = "ch1", "ch2", "ch3", "ch4",
554 compatible = "st,stm32-pwm";
555 #pwm-cells = <3>;
560 compatible = "st,stm32h7-timer-trigger";
566 compatible = "st,stm32-timer-counter";
572 compatible = "st,stm32h7-uart";
574 interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
577 wakeup-source;
580 dma-names = "rx", "tx";
584 i2s1: audio-controller@44004000 {
585 compatible = "st,stm32h7-i2s";
587 #sound-dai-cells = <0>;
591 dma-names = "rx", "tx";
596 compatible = "st,stm32h7-spi";
601 #address-cells = <1>;
602 #size-cells = <0>;
605 dma-names = "rx", "tx";
610 compatible = "st,stm32h7-sai";
613 #address-cells = <1>;
614 #size-cells = <1>;
619 sai1a: audio-controller@4400a004 {
620 compatible = "st,stm32-sai-sub-a";
622 #sound-dai-cells = <0>;
624 clock-names = "sai_ck";
629 sai1b: audio-controller@4400a024 {
630 compatible = "st,stm32-sai-sub-b";
632 #sound-dai-cells = <0>;
634 clock-names = "sai_ck";
641 compatible = "st,stm32h7-sai";
644 #address-cells = <1>;
645 #size-cells = <1>;
650 sai2a: audio-controller@4400b004 {
651 compatible = "st,stm32-sai-sub-a";
653 #sound-dai-cells = <0>;
655 clock-names = "sai_ck";
660 sai2b: audio-controller@4400b024 {
661 compatible = "st,stm32-sai-sub-b";
663 #sound-dai-cells = <0>;
665 clock-names = "sai_ck";
671 dfsdm: dfsdm@4400d000 { label
672 compatible = "st,stm32mp1-dfsdm";
675 clock-names = "dfsdm";
676 #address-cells = <1>;
677 #size-cells = <0>;
681 compatible = "st,stm32-dfsdm-adc";
683 #io-channel-cells = <1>;
686 dma-names = "rx";
691 compatible = "st,stm32-dfsdm-adc";
693 #io-channel-cells = <1>;
696 dma-names = "rx";
701 dma1: dma-controller@48000000 {
702 compatible = "st,stm32-dma";
714 #dma-cells = <4>;
716 dma-requests = <8>;
719 dma2: dma-controller@48001000 {
720 compatible = "st,stm32-dma";
732 #dma-cells = <4>;
734 dma-requests = <8>;
737 dmamux1: dma-router@48002000 {
738 compatible = "st,stm32h7-dmamux";
742 #dma-cells = <3>;
743 dma-masters = <&dma1 &dma2>;
744 dma-requests = <128>;
745 dma-channels = <16>;
749 compatible = "st,stm32mp13-rcc", "syscon";
751 #clock-cells = <1>;
752 #reset-cells = <1>;
753 clock-names = "hse", "hsi", "csi", "lse", "lsi";
762 compatible = "st,stm32mp1,pwr-reg";
767 regulator-name = "reg11";
768 regulator-min-microvolt = <1100000>;
769 regulator-max-microvolt = <1100000>;
773 regulator-name = "reg18";
774 regulator-min-microvolt = <1800000>;
775 regulator-max-microvolt = <1800000>;
779 regulator-name = "usb33";
780 regulator-min-microvolt = <3300000>;
781 regulator-max-microvolt = <3300000>;
785 exti: interrupt-controller@5000d000 {
786 compatible = "st,stm32mp1-exti", "syscon";
787 interrupt-controller;
788 #interrupt-cells = <2>;
790 interrupts-extended =
865 compatible = "st,stm32mp157-syscfg", "syscon";
871 compatible = "st,stm32-lptimer";
873 interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
875 clock-names = "mux";
876 wakeup-source;
880 compatible = "st,stm32-pwm-lp";
881 #pwm-cells = <3>;
886 compatible = "st,stm32-lptimer-timer";
892 compatible = "st,stm32-lptimer";
894 interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
896 clock-names = "mux";
897 wakeup-source;
901 compatible = "st,stm32-pwm-lp";
902 #pwm-cells = <3>;
907 compatible = "st,stm32-lptimer-timer";
912 mdma: dma-controller@58000000 {
913 compatible = "st,stm32h7-mdma";
917 #dma-cells = <5>;
918 dma-channels = <32>;
919 dma-requests = <48>;
923 compatible = "st,stm32f7-crc";
930 compatible = "generic-ohci";
939 compatible = "generic-ehci";
949 compatible = "st,stm32mp1-iwdg";
952 clock-names = "pclk", "lsi";
957 compatible = "st,stm32mp1-rtc";
959 interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
962 clock-names = "pclk", "rtc_ck";
967 compatible = "st,stm32mp13-bsec";
969 #address-cells = <1>;
970 #size-cells = <1>;
991 compatible = "st,stm32-etzpc", "simple-bus";
993 #address-cells = <1>;
994 #size-cells = <1>;
995 #access-controller-cells = <1>;
999 compatible = "st,stm32mp13-adc-core";
1003 clock-names = "bus", "adc";
1004 interrupt-controller;
1005 #interrupt-cells = <1>;
1006 #address-cells = <1>;
1007 #size-cells = <0>;
1008 access-controllers = <&etzpc 33>;
1012 compatible = "st,stm32mp13-adc";
1013 #io-channel-cells = <1>;
1014 #address-cells = <1>;
1015 #size-cells = <0>;
1017 interrupt-parent = <&adc_2>;
1020 dma-names = "rx";
1043 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
1046 clock-names = "otg";
1048 reset-names = "dwc2";
1050 g-rx-fifo-size = <512>;
1051 g-np-tx-fifo-size = <32>;
1052 g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
1054 otg-rev = <0x200>;
1055 usb33d-supply = <&scmi_usb33>;
1056 access-controllers = <&etzpc 34>;
1061 compatible = "st,stm32h7-uart";
1063 interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
1066 wakeup-source;
1069 dma-names = "rx", "tx";
1070 access-controllers = <&etzpc 16>;
1075 compatible = "st,stm32h7-uart";
1077 interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
1080 wakeup-source;
1083 dma-names = "rx", "tx";
1084 access-controllers = <&etzpc 17>;
1088 i2s4: audio-controller@4c002000 {
1089 compatible = "st,stm32h7-i2s";
1091 #sound-dai-cells = <0>;
1095 dma-names = "rx", "tx";
1096 access-controllers = <&etzpc 13>;
1101 compatible = "st,stm32h7-spi";
1106 #address-cells = <1>;
1107 #size-cells = <0>;
1110 dma-names = "rx", "tx";
1111 access-controllers = <&etzpc 18>;
1116 compatible = "st,stm32h7-spi";
1121 #address-cells = <1>;
1122 #size-cells = <0>;
1125 dma-names = "rx", "tx";
1126 access-controllers = <&etzpc 19>;
1131 compatible = "st,stm32mp13-i2c";
1133 interrupt-names = "event", "error";
1138 #address-cells = <1>;
1139 #size-cells = <0>;
1142 dma-names = "rx", "tx";
1143 st,syscfg-fmp = <&syscfg 0x4 0x4>;
1144 i2c-analog-filter;
1145 access-controllers = <&etzpc 20>;
1150 compatible = "st,stm32mp13-i2c";
1152 interrupt-names = "event", "error";
1157 #address-cells = <1>;
1158 #size-cells = <0>;
1161 dma-names = "rx", "tx";
1162 st,syscfg-fmp = <&syscfg 0x4 0x8>;
1163 i2c-analog-filter;
1164 access-controllers = <&etzpc 21>;
1169 compatible = "st,stm32mp13-i2c";
1171 interrupt-names = "event", "error";
1176 #address-cells = <1>;
1177 #size-cells = <0>;
1180 dma-names = "rx", "tx";
1181 st,syscfg-fmp = <&syscfg 0x4 0x10>;
1182 i2c-analog-filter;
1183 access-controllers = <&etzpc 22>;
1188 #address-cells = <1>;
1189 #size-cells = <0>;
1190 compatible = "st,stm32-timers";
1193 interrupt-names = "global";
1195 clock-names = "int";
1196 access-controllers = <&etzpc 23>;
1200 compatible = "st,stm32-pwm";
1201 #pwm-cells = <3>;
1206 compatible = "st,stm32h7-timer-trigger";
1213 #address-cells = <1>;
1214 #size-cells = <0>;
1215 compatible = "st,stm32-timers";
1218 interrupt-names = "global";
1220 clock-names = "int";
1221 access-controllers = <&etzpc 24>;
1225 compatible = "st,stm32-pwm";
1226 #pwm-cells = <3>;
1231 compatible = "st,stm32h7-timer-trigger";
1238 #address-cells = <1>;
1239 #size-cells = <0>;
1240 compatible = "st,stm32-timers";
1243 interrupt-names = "global";
1245 clock-names = "int";
1246 access-controllers = <&etzpc 25>;
1250 compatible = "st,stm32-pwm";
1251 #pwm-cells = <3>;
1256 compatible = "st,stm32h7-timer-trigger";
1263 #address-cells = <1>;
1264 #size-cells = <0>;
1265 compatible = "st,stm32-timers";
1268 interrupt-names = "global";
1270 clock-names = "int";
1275 dma-names = "ch1", "up", "trig", "com";
1276 access-controllers = <&etzpc 26>;
1280 compatible = "st,stm32-pwm";
1281 #pwm-cells = <3>;
1286 compatible = "st,stm32h7-timer-trigger";
1293 #address-cells = <1>;
1294 #size-cells = <0>;
1295 compatible = "st,stm32-timers";
1298 interrupt-names = "global";
1300 clock-names = "int";
1303 dma-names = "ch1", "up";
1304 access-controllers = <&etzpc 27>;
1308 compatible = "st,stm32-pwm";
1309 #pwm-cells = <3>;
1314 compatible = "st,stm32h7-timer-trigger";
1321 #address-cells = <1>;
1322 #size-cells = <0>;
1323 compatible = "st,stm32-timers";
1326 interrupt-names = "global";
1328 clock-names = "int";
1331 dma-names = "ch1", "up";
1332 access-controllers = <&etzpc 28>;
1336 compatible = "st,stm32-pwm";
1337 #pwm-cells = <3>;
1342 compatible = "st,stm32h7-timer-trigger";
1349 #address-cells = <1>;
1350 #size-cells = <0>;
1351 compatible = "st,stm32-lptimer";
1353 interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
1355 clock-names = "mux";
1356 wakeup-source;
1357 access-controllers = <&etzpc 1>;
1361 compatible = "st,stm32-pwm-lp";
1362 #pwm-cells = <3>;
1367 compatible = "st,stm32-lptimer-trigger";
1373 compatible = "st,stm32-lptimer-counter";
1378 compatible = "st,stm32-lptimer-timer";
1384 #address-cells = <1>;
1385 #size-cells = <0>;
1386 compatible = "st,stm32-lptimer";
1388 interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
1390 clock-names = "mux";
1391 wakeup-source;
1392 access-controllers = <&etzpc 2>;
1396 compatible = "st,stm32-pwm-lp";
1397 #pwm-cells = <3>;
1402 compatible = "st,stm32-lptimer-trigger";
1408 compatible = "st,stm32-lptimer-timer";
1414 compatible = "st,stm32mp13-hash";
1420 dma-names = "in";
1421 access-controllers = <&etzpc 41>;
1426 compatible = "st,stm32mp13-rng";
1430 access-controllers = <&etzpc 40>;
1434 fmc: memory-controller@58002000 {
1435 compatible = "st,stm32mp1-fmc2-ebi";
1442 #address-cells = <2>;
1443 #size-cells = <1>;
1446 access-controllers = <&etzpc 54>;
1449 nand-controller@4,0 {
1450 compatible = "st,stm32mp1-fmc2-nfc";
1457 #address-cells = <1>;
1458 #size-cells = <0>;
1463 dma-names = "tx", "rx", "ecc";
1469 compatible = "st,stm32f469-qspi";
1471 reg-names = "qspi", "qspi_mm";
1472 #address-cells = <1>;
1473 #size-cells = <0>;
1477 dma-names = "tx", "rx";
1480 access-controllers = <&etzpc 55>;
1485 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1486 arm,primecell-periphid = <0x20253180>;
1490 clock-names = "apb_pclk";
1492 cap-sd-highspeed;
1493 cap-mmc-highspeed;
1494 max-frequency = <130000000>;
1495 access-controllers = <&etzpc 50>;
1500 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1501 arm,primecell-periphid = <0x20253180>;
1505 clock-names = "apb_pclk";
1507 cap-sd-highspeed;
1508 cap-mmc-highspeed;
1509 max-frequency = <130000000>;
1510 access-controllers = <&etzpc 51>;
1515 compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
1517 reg-names = "stmmaceth";
1518 interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1520 interrupt-names = "macirq", "eth_wake_irq";
1521 clock-names = "stmmaceth",
1522 "mac-clk-tx",
1523 "mac-clk-rx",
1525 "eth-ck";
1532 snps,mixed-burst;
1534 snps,axi-config = <&stmmac_axi_config_1>;
1536 access-controllers = <&etzpc 48>;
1539 stmmac_axi_config_1: stmmac-axi-config {
1547 #address-cells = <1>;
1548 #size-cells = <0>;
1549 #clock-cells = <0>;
1550 compatible = "st,stm32mp1-usbphyc";
1554 vdda1v1-supply = <&scmi_reg11>;
1555 vdda1v8-supply = <&scmi_reg18>;
1556 access-controllers = <&etzpc 5>;
1559 usbphyc_port0: usb-phy@0 {
1560 #phy-cells = <0>;
1564 usbphyc_port1: usb-phy@1 {
1565 #phy-cells = <1>;
1576 #address-cells = <1>;
1577 #size-cells = <1>;
1578 compatible = "st,stm32mp135-pinctrl";
1580 interrupt-parent = <&exti>;
1584 gpio-controller;
1585 #gpio-cells = <2>;
1586 interrupt-controller;
1587 #interrupt-cells = <2>;
1590 st,bank-name = "GPIOA";
1592 gpio-ranges = <&pinctrl 0 0 16>;
1596 gpio-controller;
1597 #gpio-cells = <2>;
1598 interrupt-controller;
1599 #interrupt-cells = <2>;
1602 st,bank-name = "GPIOB";
1604 gpio-ranges = <&pinctrl 0 16 16>;
1608 gpio-controller;
1609 #gpio-cells = <2>;
1610 interrupt-controller;
1611 #interrupt-cells = <2>;
1614 st,bank-name = "GPIOC";
1616 gpio-ranges = <&pinctrl 0 32 16>;
1620 gpio-controller;
1621 #gpio-cells = <2>;
1622 interrupt-controller;
1623 #interrupt-cells = <2>;
1626 st,bank-name = "GPIOD";
1628 gpio-ranges = <&pinctrl 0 48 16>;
1632 gpio-controller;
1633 #gpio-cells = <2>;
1634 interrupt-controller;
1635 #interrupt-cells = <2>;
1638 st,bank-name = "GPIOE";
1640 gpio-ranges = <&pinctrl 0 64 16>;
1644 gpio-controller;
1645 #gpio-cells = <2>;
1646 interrupt-controller;
1647 #interrupt-cells = <2>;
1650 st,bank-name = "GPIOF";
1652 gpio-ranges = <&pinctrl 0 80 16>;
1656 gpio-controller;
1657 #gpio-cells = <2>;
1658 interrupt-controller;
1659 #interrupt-cells = <2>;
1662 st,bank-name = "GPIOG";
1664 gpio-ranges = <&pinctrl 0 96 16>;
1668 gpio-controller;
1669 #gpio-cells = <2>;
1670 interrupt-controller;
1671 #interrupt-cells = <2>;
1674 st,bank-name = "GPIOH";
1676 gpio-ranges = <&pinctrl 0 112 15>;
1680 gpio-controller;
1681 #gpio-cells = <2>;
1682 interrupt-controller;
1683 #interrupt-cells = <2>;
1686 st,bank-name = "GPIOI";
1688 gpio-ranges = <&pinctrl 0 128 8>;