Lines Matching +full:stm32 +full:- +full:rcc
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
25 arm-pmu {
26 compatible = "arm,cortex-a7-pmu";
28 interrupt-affinity = <&cpu0>;
29 interrupt-parent = <&intc>;
33 compatible = "arm,smc-wdt";
34 arm,smc-id = <0xbc000000>;
41 compatible = "linaro,optee-tz";
42 interrupt-parent = <&intc>;
47 compatible = "linaro,scmi-optee";
48 #address-cells = <1>;
49 #size-cells = <0>;
50 linaro,optee-channel-id = <0>;
54 #clock-cells = <1>;
59 #reset-cells = <1>;
66 #address-cells = <1>;
67 #size-cells = <0>;
71 regulator-name = "reg11";
75 regulator-name = "reg18";
79 regulator-name = "usb33";
86 intc: interrupt-controller@a0021000 {
87 compatible = "arm,cortex-a7-gic";
88 #interrupt-cells = <3>;
89 interrupt-controller;
95 compatible = "arm,psci-1.0";
100 compatible = "arm,armv7-timer";
105 interrupt-parent = <&intc>;
106 always-on;
109 thermal-zones {
110 cpu_thermal: cpu-thermal {
111 polling-delay-passive = <0>;
112 polling-delay = <0>;
113 thermal-sensors = <&dts>;
116 cpu_alert1: cpu-alert1 {
122 cpu-crit {
129 cooling-maps {
135 compatible = "simple-bus";
136 #address-cells = <1>;
137 #size-cells = <1>;
138 interrupt-parent = <&intc>;
142 #address-cells = <1>;
143 #size-cells = <0>;
144 compatible = "st,stm32-timers";
147 interrupt-names = "global";
148 clocks = <&rcc TIM2_K>;
149 clock-names = "int";
155 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
159 compatible = "st,stm32-pwm";
160 #pwm-cells = <3>;
165 compatible = "st,stm32h7-timer-trigger";
171 compatible = "st,stm32-timer-counter";
177 #address-cells = <1>;
178 #size-cells = <0>;
179 compatible = "st,stm32-timers";
182 interrupt-names = "global";
183 clocks = <&rcc TIM3_K>;
184 clock-names = "int";
191 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
195 compatible = "st,stm32-pwm";
196 #pwm-cells = <3>;
201 compatible = "st,stm32h7-timer-trigger";
207 compatible = "st,stm32-timer-counter";
213 #address-cells = <1>;
214 #size-cells = <0>;
215 compatible = "st,stm32-timers";
218 interrupt-names = "global";
219 clocks = <&rcc TIM4_K>;
220 clock-names = "int";
225 dma-names = "ch1", "ch2", "ch3", "up";
229 compatible = "st,stm32-pwm";
230 #pwm-cells = <3>;
235 compatible = "st,stm32h7-timer-trigger";
241 compatible = "st,stm32-timer-counter";
247 #address-cells = <1>;
248 #size-cells = <0>;
249 compatible = "st,stm32-timers";
252 interrupt-names = "global";
253 clocks = <&rcc TIM5_K>;
254 clock-names = "int";
261 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
265 compatible = "st,stm32-pwm";
266 #pwm-cells = <3>;
271 compatible = "st,stm32h7-timer-trigger";
277 compatible = "st,stm32-timer-counter";
283 #address-cells = <1>;
284 #size-cells = <0>;
285 compatible = "st,stm32-timers";
288 interrupt-names = "global";
289 clocks = <&rcc TIM6_K>;
290 clock-names = "int";
292 dma-names = "up";
296 compatible = "st,stm32-timer-counter";
301 compatible = "st,stm32h7-timer-trigger";
308 #address-cells = <1>;
309 #size-cells = <0>;
310 compatible = "st,stm32-timers";
313 interrupt-names = "global";
314 clocks = <&rcc TIM7_K>;
315 clock-names = "int";
317 dma-names = "up";
321 compatible = "st,stm32-timer-counter";
326 compatible = "st,stm32h7-timer-trigger";
333 #address-cells = <1>;
334 #size-cells = <0>;
335 compatible = "st,stm32-lptimer";
337 interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
338 clocks = <&rcc LPTIM1_K>;
339 clock-names = "mux";
340 wakeup-source;
344 compatible = "st,stm32-pwm-lp";
345 #pwm-cells = <3>;
350 compatible = "st,stm32-lptimer-trigger";
356 compatible = "st,stm32-lptimer-counter";
361 compatible = "st,stm32-lptimer-timer";
366 i2s2: audio-controller@4000b000 {
367 compatible = "st,stm32h7-i2s";
369 #sound-dai-cells = <0>;
373 dma-names = "rx", "tx";
378 compatible = "st,stm32h7-spi";
381 clocks = <&rcc SPI2_K>;
382 resets = <&rcc SPI2_R>;
383 #address-cells = <1>;
384 #size-cells = <0>;
387 dma-names = "rx", "tx";
391 i2s3: audio-controller@4000c000 {
392 compatible = "st,stm32h7-i2s";
394 #sound-dai-cells = <0>;
398 dma-names = "rx", "tx";
403 compatible = "st,stm32h7-spi";
406 clocks = <&rcc SPI3_K>;
407 resets = <&rcc SPI3_R>;
408 #address-cells = <1>;
409 #size-cells = <0>;
412 dma-names = "rx", "tx";
416 spdifrx: audio-controller@4000d000 {
417 compatible = "st,stm32h7-spdifrx";
419 #sound-dai-cells = <0>;
420 clocks = <&rcc SPDIF_K>;
421 clock-names = "kclk";
425 dma-names = "rx", "rx-ctrl";
430 compatible = "st,stm32h7-uart";
432 interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
433 clocks = <&rcc USART3_K>;
434 resets = <&rcc USART3_R>;
435 wakeup-source;
438 dma-names = "rx", "tx";
443 compatible = "st,stm32h7-uart";
445 interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
446 clocks = <&rcc UART4_K>;
447 resets = <&rcc UART4_R>;
448 wakeup-source;
451 dma-names = "rx", "tx";
456 compatible = "st,stm32h7-uart";
458 interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
459 clocks = <&rcc UART5_K>;
460 resets = <&rcc UART5_R>;
461 wakeup-source;
464 dma-names = "rx", "tx";
469 compatible = "st,stm32mp13-i2c";
471 interrupt-names = "event", "error";
474 clocks = <&rcc I2C1_K>;
475 resets = <&rcc I2C1_R>;
476 #address-cells = <1>;
477 #size-cells = <0>;
480 dma-names = "rx", "tx";
481 st,syscfg-fmp = <&syscfg 0x4 0x1>;
482 i2c-analog-filter;
487 compatible = "st,stm32mp13-i2c";
489 interrupt-names = "event", "error";
492 clocks = <&rcc I2C2_K>;
493 resets = <&rcc I2C2_R>;
494 #address-cells = <1>;
495 #size-cells = <0>;
498 dma-names = "rx", "tx";
499 st,syscfg-fmp = <&syscfg 0x4 0x2>;
500 i2c-analog-filter;
505 compatible = "st,stm32h7-uart";
507 interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&rcc UART7_K>;
509 resets = <&rcc UART7_R>;
510 wakeup-source;
513 dma-names = "rx", "tx";
518 compatible = "st,stm32h7-uart";
520 interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
521 clocks = <&rcc UART8_K>;
522 resets = <&rcc UART8_R>;
523 wakeup-source;
526 dma-names = "rx", "tx";
531 #address-cells = <1>;
532 #size-cells = <0>;
533 compatible = "st,stm32-timers";
539 interrupt-names = "brk", "up", "trg-com", "cc";
540 clocks = <&rcc TIM1_K>;
541 clock-names = "int";
549 dma-names = "ch1", "ch2", "ch3", "ch4",
554 compatible = "st,stm32-pwm";
555 #pwm-cells = <3>;
560 compatible = "st,stm32h7-timer-trigger";
566 compatible = "st,stm32-timer-counter";
572 #address-cells = <1>;
573 #size-cells = <0>;
574 compatible = "st,stm32-timers";
580 interrupt-names = "brk", "up", "trg-com", "cc";
581 clocks = <&rcc TIM8_K>;
582 clock-names = "int";
590 dma-names = "ch1", "ch2", "ch3", "ch4",
595 compatible = "st,stm32-pwm";
596 #pwm-cells = <3>;
601 compatible = "st,stm32h7-timer-trigger";
607 compatible = "st,stm32-timer-counter";
613 compatible = "st,stm32h7-uart";
615 interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
616 clocks = <&rcc USART6_K>;
617 resets = <&rcc USART6_R>;
618 wakeup-source;
621 dma-names = "rx", "tx";
625 i2s1: audio-controller@44004000 {
626 compatible = "st,stm32h7-i2s";
628 #sound-dai-cells = <0>;
632 dma-names = "rx", "tx";
637 compatible = "st,stm32h7-spi";
640 clocks = <&rcc SPI1_K>;
641 resets = <&rcc SPI1_R>;
642 #address-cells = <1>;
643 #size-cells = <0>;
646 dma-names = "rx", "tx";
651 compatible = "st,stm32h7-sai";
654 #address-cells = <1>;
655 #size-cells = <1>;
657 resets = <&rcc SAI1_R>;
660 sai1a: audio-controller@4400a004 {
661 compatible = "st,stm32-sai-sub-a";
663 #sound-dai-cells = <0>;
664 clocks = <&rcc SAI1_K>;
665 clock-names = "sai_ck";
670 sai1b: audio-controller@4400a024 {
671 compatible = "st,stm32-sai-sub-b";
673 #sound-dai-cells = <0>;
674 clocks = <&rcc SAI1_K>;
675 clock-names = "sai_ck";
682 compatible = "st,stm32h7-sai";
685 #address-cells = <1>;
686 #size-cells = <1>;
688 resets = <&rcc SAI2_R>;
691 sai2a: audio-controller@4400b004 {
692 compatible = "st,stm32-sai-sub-a";
694 #sound-dai-cells = <0>;
695 clocks = <&rcc SAI2_K>;
696 clock-names = "sai_ck";
701 sai2b: audio-controller@4400b024 {
702 compatible = "st,stm32-sai-sub-b";
704 #sound-dai-cells = <0>;
705 clocks = <&rcc SAI2_K>;
706 clock-names = "sai_ck";
713 compatible = "st,stm32mp1-dfsdm";
715 clocks = <&rcc DFSDM_K>;
716 clock-names = "dfsdm";
717 #address-cells = <1>;
718 #size-cells = <0>;
722 compatible = "st,stm32-dfsdm-adc";
724 #io-channel-cells = <1>;
727 dma-names = "rx";
732 compatible = "st,stm32-dfsdm-adc";
734 #io-channel-cells = <1>;
737 dma-names = "rx";
742 dma1: dma-controller@48000000 {
743 compatible = "st,stm32-dma";
753 clocks = <&rcc DMA1>;
754 resets = <&rcc DMA1_R>;
755 #dma-cells = <4>;
757 dma-requests = <8>;
760 dma2: dma-controller@48001000 {
761 compatible = "st,stm32-dma";
771 clocks = <&rcc DMA2>;
772 resets = <&rcc DMA2_R>;
773 #dma-cells = <4>;
775 dma-requests = <8>;
778 dmamux1: dma-router@48002000 {
779 compatible = "st,stm32h7-dmamux";
781 clocks = <&rcc DMAMUX1>;
782 resets = <&rcc DMAMUX1_R>;
783 #dma-cells = <3>;
784 dma-masters = <&dma1 &dma2>;
785 dma-requests = <128>;
786 dma-channels = <16>;
789 rcc: rcc@50000000 { label
790 compatible = "st,stm32mp13-rcc", "syscon";
792 #clock-cells = <1>;
793 #reset-cells = <1>;
794 clock-names = "hse", "hsi", "csi", "lse", "lsi";
803 compatible = "st,stm32mp1,pwr-reg";
808 regulator-name = "reg11";
809 regulator-min-microvolt = <1100000>;
810 regulator-max-microvolt = <1100000>;
814 regulator-name = "reg18";
815 regulator-min-microvolt = <1800000>;
816 regulator-max-microvolt = <1800000>;
820 regulator-name = "usb33";
821 regulator-min-microvolt = <3300000>;
822 regulator-max-microvolt = <3300000>;
826 exti: interrupt-controller@5000d000 {
827 compatible = "st,stm32mp1-exti", "syscon";
828 interrupt-controller;
829 #interrupt-cells = <2>;
831 interrupts-extended =
906 compatible = "st,stm32mp157-syscfg", "syscon";
908 clocks = <&rcc SYSCFG>;
912 compatible = "st,stm32-lptimer";
914 interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
915 clocks = <&rcc LPTIM4_K>;
916 clock-names = "mux";
917 wakeup-source;
921 compatible = "st,stm32-pwm-lp";
922 #pwm-cells = <3>;
927 compatible = "st,stm32-lptimer-timer";
933 compatible = "st,stm32-lptimer";
935 interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
936 clocks = <&rcc LPTIM5_K>;
937 clock-names = "mux";
938 wakeup-source;
942 compatible = "st,stm32-pwm-lp";
943 #pwm-cells = <3>;
948 compatible = "st,stm32-lptimer-timer";
954 compatible = "st,stm32-thermal";
957 clocks = <&rcc DTS>;
958 clock-names = "pclk";
959 #thermal-sensor-cells = <0>;
964 compatible = "st,stm32mp131-hdp";
966 clocks = <&rcc HDP>;
970 mdma: dma-controller@58000000 {
971 compatible = "st,stm32h7-mdma";
974 clocks = <&rcc MDMA>;
975 #dma-cells = <5>;
976 dma-channels = <32>;
977 dma-requests = <48>;
981 compatible = "st,stm32f7-crc";
983 clocks = <&rcc CRC1>;
988 compatible = "generic-ohci";
990 clocks = <&usbphyc>, <&rcc USBH>;
991 resets = <&rcc USBH_R>;
997 compatible = "generic-ehci";
999 clocks = <&usbphyc>, <&rcc USBH>;
1000 resets = <&rcc USBH_R>;
1007 compatible = "st,stm32mp1-iwdg";
1010 clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
1011 clock-names = "pclk", "lsi";
1016 compatible = "st,stm32mp1-rtc";
1018 interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
1021 clock-names = "pclk", "rtc_ck";
1026 compatible = "st,stm32mp13-bsec";
1028 #address-cells = <1>;
1029 #size-cells = <1>;
1035 vrefint: vrefin-cal@52 {
1053 compatible = "st,stm32-etzpc", "simple-bus";
1055 #address-cells = <1>;
1056 #size-cells = <1>;
1057 #access-controller-cells = <1>;
1061 compatible = "st,stm32mp13-adc-core";
1064 clocks = <&rcc ADC2>, <&rcc ADC2_K>;
1065 clock-names = "bus", "adc";
1066 interrupt-controller;
1067 #interrupt-cells = <1>;
1068 #address-cells = <1>;
1069 #size-cells = <0>;
1070 access-controllers = <&etzpc 33>;
1074 compatible = "st,stm32mp13-adc";
1075 #io-channel-cells = <1>;
1076 #address-cells = <1>;
1077 #size-cells = <0>;
1079 interrupt-parent = <&adc_2>;
1082 dma-names = "rx";
1083 nvmem-cells = <&vrefint>;
1084 nvmem-cell-names = "vrefint";
1107 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
1109 clocks = <&rcc USBO_K>;
1110 clock-names = "otg";
1111 resets = <&rcc USBO_R>;
1112 reset-names = "dwc2";
1114 g-rx-fifo-size = <512>;
1115 g-np-tx-fifo-size = <32>;
1116 g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
1118 otg-rev = <0x200>;
1119 usb33d-supply = <&scmi_usb33>;
1120 access-controllers = <&etzpc 34>;
1125 compatible = "st,stm32h7-uart";
1127 interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
1128 clocks = <&rcc USART1_K>;
1129 resets = <&rcc USART1_R>;
1130 wakeup-source;
1133 dma-names = "rx", "tx";
1134 access-controllers = <&etzpc 16>;
1139 compatible = "st,stm32h7-uart";
1141 interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
1142 clocks = <&rcc USART2_K>;
1143 resets = <&rcc USART2_R>;
1144 wakeup-source;
1147 dma-names = "rx", "tx";
1148 access-controllers = <&etzpc 17>;
1152 i2s4: audio-controller@4c002000 {
1153 compatible = "st,stm32h7-i2s";
1155 #sound-dai-cells = <0>;
1159 dma-names = "rx", "tx";
1160 access-controllers = <&etzpc 13>;
1165 compatible = "st,stm32h7-spi";
1168 clocks = <&rcc SPI4_K>;
1169 resets = <&rcc SPI4_R>;
1170 #address-cells = <1>;
1171 #size-cells = <0>;
1174 dma-names = "rx", "tx";
1175 access-controllers = <&etzpc 18>;
1180 compatible = "st,stm32h7-spi";
1183 clocks = <&rcc SPI5_K>;
1184 resets = <&rcc SPI5_R>;
1185 #address-cells = <1>;
1186 #size-cells = <0>;
1189 dma-names = "rx", "tx";
1190 access-controllers = <&etzpc 19>;
1195 compatible = "st,stm32mp13-i2c";
1197 interrupt-names = "event", "error";
1200 clocks = <&rcc I2C3_K>;
1201 resets = <&rcc I2C3_R>;
1202 #address-cells = <1>;
1203 #size-cells = <0>;
1206 dma-names = "rx", "tx";
1207 st,syscfg-fmp = <&syscfg 0x4 0x4>;
1208 i2c-analog-filter;
1209 access-controllers = <&etzpc 20>;
1214 compatible = "st,stm32mp13-i2c";
1216 interrupt-names = "event", "error";
1219 clocks = <&rcc I2C4_K>;
1220 resets = <&rcc I2C4_R>;
1221 #address-cells = <1>;
1222 #size-cells = <0>;
1225 dma-names = "rx", "tx";
1226 st,syscfg-fmp = <&syscfg 0x4 0x8>;
1227 i2c-analog-filter;
1228 access-controllers = <&etzpc 21>;
1233 compatible = "st,stm32mp13-i2c";
1235 interrupt-names = "event", "error";
1238 clocks = <&rcc I2C5_K>;
1239 resets = <&rcc I2C5_R>;
1240 #address-cells = <1>;
1241 #size-cells = <0>;
1244 dma-names = "rx", "tx";
1245 st,syscfg-fmp = <&syscfg 0x4 0x10>;
1246 i2c-analog-filter;
1247 access-controllers = <&etzpc 22>;
1252 #address-cells = <1>;
1253 #size-cells = <0>;
1254 compatible = "st,stm32-timers";
1257 interrupt-names = "global";
1258 clocks = <&rcc TIM12_K>;
1259 clock-names = "int";
1260 access-controllers = <&etzpc 23>;
1264 compatible = "st,stm32-timer-counter";
1269 compatible = "st,stm32-pwm";
1270 #pwm-cells = <3>;
1275 compatible = "st,stm32h7-timer-trigger";
1282 #address-cells = <1>;
1283 #size-cells = <0>;
1284 compatible = "st,stm32-timers";
1287 interrupt-names = "global";
1288 clocks = <&rcc TIM13_K>;
1289 clock-names = "int";
1290 access-controllers = <&etzpc 24>;
1294 compatible = "st,stm32-timer-counter";
1299 compatible = "st,stm32-pwm";
1300 #pwm-cells = <3>;
1305 compatible = "st,stm32h7-timer-trigger";
1312 #address-cells = <1>;
1313 #size-cells = <0>;
1314 compatible = "st,stm32-timers";
1317 interrupt-names = "global";
1318 clocks = <&rcc TIM14_K>;
1319 clock-names = "int";
1320 access-controllers = <&etzpc 25>;
1324 compatible = "st,stm32-timer-counter";
1329 compatible = "st,stm32-pwm";
1330 #pwm-cells = <3>;
1335 compatible = "st,stm32h7-timer-trigger";
1342 #address-cells = <1>;
1343 #size-cells = <0>;
1344 compatible = "st,stm32-timers";
1347 interrupt-names = "global";
1348 clocks = <&rcc TIM15_K>;
1349 clock-names = "int";
1354 dma-names = "ch1", "up", "trig", "com";
1355 access-controllers = <&etzpc 26>;
1359 compatible = "st,stm32-timer-counter";
1364 compatible = "st,stm32-pwm";
1365 #pwm-cells = <3>;
1370 compatible = "st,stm32h7-timer-trigger";
1377 #address-cells = <1>;
1378 #size-cells = <0>;
1379 compatible = "st,stm32-timers";
1382 interrupt-names = "global";
1383 clocks = <&rcc TIM16_K>;
1384 clock-names = "int";
1387 dma-names = "ch1", "up";
1388 access-controllers = <&etzpc 27>;
1392 compatible = "st,stm32-timer-counter";
1397 compatible = "st,stm32-pwm";
1398 #pwm-cells = <3>;
1403 compatible = "st,stm32h7-timer-trigger";
1410 #address-cells = <1>;
1411 #size-cells = <0>;
1412 compatible = "st,stm32-timers";
1415 interrupt-names = "global";
1416 clocks = <&rcc TIM17_K>;
1417 clock-names = "int";
1420 dma-names = "ch1", "up";
1421 access-controllers = <&etzpc 28>;
1425 compatible = "st,stm32-timer-counter";
1430 compatible = "st,stm32-pwm";
1431 #pwm-cells = <3>;
1436 compatible = "st,stm32h7-timer-trigger";
1443 #address-cells = <1>;
1444 #size-cells = <0>;
1445 compatible = "st,stm32-lptimer";
1447 interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
1448 clocks = <&rcc LPTIM2_K>;
1449 clock-names = "mux";
1450 wakeup-source;
1451 access-controllers = <&etzpc 1>;
1455 compatible = "st,stm32-pwm-lp";
1456 #pwm-cells = <3>;
1461 compatible = "st,stm32-lptimer-trigger";
1467 compatible = "st,stm32-lptimer-counter";
1472 compatible = "st,stm32-lptimer-timer";
1478 #address-cells = <1>;
1479 #size-cells = <0>;
1480 compatible = "st,stm32-lptimer";
1482 interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
1483 clocks = <&rcc LPTIM3_K>;
1484 clock-names = "mux";
1485 wakeup-source;
1486 access-controllers = <&etzpc 2>;
1490 compatible = "st,stm32-pwm-lp";
1491 #pwm-cells = <3>;
1496 compatible = "st,stm32-lptimer-trigger";
1502 compatible = "st,stm32-lptimer-timer";
1508 compatible = "st,stm32mp13-hash";
1511 clocks = <&rcc HASH1>;
1512 resets = <&rcc HASH1_R>;
1514 dma-names = "in";
1515 access-controllers = <&etzpc 41>;
1520 compatible = "st,stm32mp13-rng";
1522 clocks = <&rcc RNG1_K>;
1523 resets = <&rcc RNG1_R>;
1524 access-controllers = <&etzpc 40>;
1528 fmc: memory-controller@58002000 {
1529 compatible = "st,stm32mp1-fmc2-ebi";
1536 #address-cells = <2>;
1537 #size-cells = <1>;
1538 clocks = <&rcc FMC_K>;
1539 resets = <&rcc FMC_R>;
1540 access-controllers = <&etzpc 54>;
1543 nand-controller@4,0 {
1544 compatible = "st,stm32mp1-fmc2-nfc";
1551 #address-cells = <1>;
1552 #size-cells = <0>;
1557 dma-names = "tx", "rx", "ecc";
1563 compatible = "st,stm32f469-qspi";
1565 reg-names = "qspi", "qspi_mm";
1566 #address-cells = <1>;
1567 #size-cells = <0>;
1571 dma-names = "tx", "rx";
1572 clocks = <&rcc QSPI_K>;
1573 resets = <&rcc QSPI_R>;
1574 access-controllers = <&etzpc 55>;
1579 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1580 arm,primecell-periphid = <0x20253180>;
1583 clocks = <&rcc SDMMC1_K>;
1584 clock-names = "apb_pclk";
1585 resets = <&rcc SDMMC1_R>;
1586 cap-sd-highspeed;
1587 cap-mmc-highspeed;
1588 max-frequency = <130000000>;
1589 access-controllers = <&etzpc 50>;
1594 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1595 arm,primecell-periphid = <0x20253180>;
1598 clocks = <&rcc SDMMC2_K>;
1599 clock-names = "apb_pclk";
1600 resets = <&rcc SDMMC2_R>;
1601 cap-sd-highspeed;
1602 cap-mmc-highspeed;
1603 max-frequency = <130000000>;
1604 access-controllers = <&etzpc 51>;
1609 compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
1611 reg-names = "stmmaceth";
1612 interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1614 interrupt-names = "macirq", "eth_wake_irq";
1615 clock-names = "stmmaceth",
1616 "mac-clk-tx",
1617 "mac-clk-rx",
1620 "eth-ck";
1621 clocks = <&rcc ETH1MAC>,
1622 <&rcc ETH1TX>,
1623 <&rcc ETH1RX>,
1624 <&rcc ETH1STP>,
1625 <&rcc ETH1PTP_K>,
1626 <&rcc ETH1CK_K>;
1628 snps,mixed-burst;
1630 snps,axi-config = <&stmmac_axi_config_1>;
1632 access-controllers = <&etzpc 48>;
1633 nvmem-cells = <ðernet_mac1_address>;
1634 nvmem-cell-names = "mac-address";
1637 stmmac_axi_config_1: stmmac-axi-config {
1645 #address-cells = <1>;
1646 #size-cells = <0>;
1647 #clock-cells = <0>;
1648 compatible = "st,stm32mp1-usbphyc";
1650 clocks = <&rcc USBPHY_K>;
1651 resets = <&rcc USBPHY_R>;
1652 vdda1v1-supply = <&scmi_reg11>;
1653 vdda1v8-supply = <&scmi_reg18>;
1654 access-controllers = <&etzpc 5>;
1657 usbphyc_port0: usb-phy@0 {
1658 #phy-cells = <0>;
1662 usbphyc_port1: usb-phy@1 {
1663 #phy-cells = <1>;
1669 compatible = "st,stm32mp1-iwdg";
1672 clocks = <&rcc IWDG1>, <&scmi_clk CK_SCMI_LSI>;
1673 clock-names = "pclk", "lsi";
1674 access-controllers = <&etzpc 12>;
1684 #address-cells = <1>;
1685 #size-cells = <1>;
1686 compatible = "st,stm32mp135-pinctrl";
1688 interrupt-parent = <&exti>;
1692 gpio-controller;
1693 #gpio-cells = <2>;
1694 interrupt-controller;
1695 #interrupt-cells = <2>;
1697 clocks = <&rcc GPIOA>;
1698 st,bank-name = "GPIOA";
1700 gpio-ranges = <&pinctrl 0 0 16>;
1704 gpio-controller;
1705 #gpio-cells = <2>;
1706 interrupt-controller;
1707 #interrupt-cells = <2>;
1709 clocks = <&rcc GPIOB>;
1710 st,bank-name = "GPIOB";
1712 gpio-ranges = <&pinctrl 0 16 16>;
1716 gpio-controller;
1717 #gpio-cells = <2>;
1718 interrupt-controller;
1719 #interrupt-cells = <2>;
1721 clocks = <&rcc GPIOC>;
1722 st,bank-name = "GPIOC";
1724 gpio-ranges = <&pinctrl 0 32 16>;
1728 gpio-controller;
1729 #gpio-cells = <2>;
1730 interrupt-controller;
1731 #interrupt-cells = <2>;
1733 clocks = <&rcc GPIOD>;
1734 st,bank-name = "GPIOD";
1736 gpio-ranges = <&pinctrl 0 48 16>;
1740 gpio-controller;
1741 #gpio-cells = <2>;
1742 interrupt-controller;
1743 #interrupt-cells = <2>;
1745 clocks = <&rcc GPIOE>;
1746 st,bank-name = "GPIOE";
1748 gpio-ranges = <&pinctrl 0 64 16>;
1752 gpio-controller;
1753 #gpio-cells = <2>;
1754 interrupt-controller;
1755 #interrupt-cells = <2>;
1757 clocks = <&rcc GPIOF>;
1758 st,bank-name = "GPIOF";
1760 gpio-ranges = <&pinctrl 0 80 16>;
1764 gpio-controller;
1765 #gpio-cells = <2>;
1766 interrupt-controller;
1767 #interrupt-cells = <2>;
1769 clocks = <&rcc GPIOG>;
1770 st,bank-name = "GPIOG";
1772 gpio-ranges = <&pinctrl 0 96 16>;
1776 gpio-controller;
1777 #gpio-cells = <2>;
1778 interrupt-controller;
1779 #interrupt-cells = <2>;
1781 clocks = <&rcc GPIOH>;
1782 st,bank-name = "GPIOH";
1784 gpio-ranges = <&pinctrl 0 112 15>;
1788 gpio-controller;
1789 #gpio-cells = <2>;
1790 interrupt-controller;
1791 #interrupt-cells = <2>;
1793 clocks = <&rcc GPIOI>;
1794 st,bank-name = "GPIOI";
1796 gpio-ranges = <&pinctrl 0 128 8>;