Lines Matching +full:stm32f7 +full:- +full:i2c
2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
55 compatible = "fixed-clock";
56 clock-frequency = <0>;
59 clk_lse: clk-lse {
60 #clock-cells = <0>;
61 compatible = "fixed-clock";
62 clock-frequency = <32768>;
66 #clock-cells = <0>;
67 compatible = "fixed-clock";
68 clock-frequency = <0>;
74 compatible = "st,stm32-timer";
81 #address-cells = <1>;
82 #size-cells = <0>;
83 compatible = "st,stm32-lptimer";
86 clock-names = "mux";
90 compatible = "st,stm32-pwm-lp";
91 #pwm-cells = <3>;
96 compatible = "st,stm32-lptimer-trigger";
102 compatible = "st,stm32-lptimer-counter";
108 #address-cells = <1>;
109 #size-cells = <0>;
110 compatible = "st,stm32h7-spi";
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "st,stm32h7-spi";
131 compatible = "st,stm32h7-uart";
139 compatible = "st,stm32h7-uart";
147 compatible = "st,stm32h7-uart";
154 i2c1: i2c@40005400 {
155 compatible = "st,stm32f7-i2c";
156 #address-cells = <1>;
157 #size-cells = <0>;
166 i2c2: i2c@40005800 {
167 compatible = "st,stm32f7-i2c";
168 #address-cells = <1>;
169 #size-cells = <0>;
178 i2c3: i2c@40005c00 {
179 compatible = "st,stm32f7-i2c";
180 #address-cells = <1>;
181 #size-cells = <0>;
191 compatible = "st,stm32h7-dac-core";
194 clock-names = "pclk";
195 #address-cells = <1>;
196 #size-cells = <0>;
200 compatible = "st,stm32-dac";
201 #io-channel-cells = <1>;
207 compatible = "st,stm32-dac";
208 #io-channel-cells = <1>;
215 compatible = "st,stm32h7-uart";
223 #address-cells = <1>;
224 #size-cells = <0>;
225 compatible = "st,stm32h7-spi";
234 #address-cells = <1>;
235 #size-cells = <0>;
236 compatible = "st,stm32h7-spi";
245 #address-cells = <1>;
246 #size-cells = <0>;
247 compatible = "st,stm32h7-spi";
255 dma1: dma-controller@40020000 {
256 compatible = "st,stm32-dma";
267 #dma-cells = <4>;
269 dma-requests = <8>;
273 dma2: dma-controller@40020400 {
274 compatible = "st,stm32-dma";
285 #dma-cells = <4>;
287 dma-requests = <8>;
291 dmamux1: dma-router@40020800 {
292 compatible = "st,stm32h7-dmamux";
294 #dma-cells = <3>;
295 dma-channels = <16>;
296 dma-requests = <128>;
297 dma-masters = <&dma1 &dma2>;
302 compatible = "st,stm32h7-adc-core";
306 clock-names = "bus";
307 interrupt-controller;
308 #interrupt-cells = <1>;
309 #address-cells = <1>;
310 #size-cells = <0>;
314 compatible = "st,stm32h7-adc";
315 #io-channel-cells = <1>;
317 interrupt-parent = <&adc_12>;
323 compatible = "st,stm32h7-adc";
324 #io-channel-cells = <1>;
326 interrupt-parent = <&adc_12>;
333 compatible = "st,stm32f7-hsotg";
337 clock-names = "otg";
338 g-rx-fifo-size = <256>;
339 g-np-tx-fifo-size = <32>;
340 g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
345 compatible = "st,stm32f4x9-fsotg";
349 clock-names = "otg";
353 ltdc: display-controller@50001000 {
354 compatible = "st,stm32-ltdc";
359 clock-names = "lcd";
363 mdma1: dma-controller@52000000 {
364 compatible = "st,stm32h7-mdma";
368 #dma-cells = <5>;
369 dma-channels = <16>;
370 dma-requests = <32>;
375 arm,primecell-periphid = <0x10153180>;
379 clock-names = "apb_pclk";
381 cap-sd-highspeed;
382 cap-mmc-highspeed;
383 max-frequency = <120000000>;
388 arm,primecell-periphid = <0x10153180>;
392 clock-names = "apb_pclk";
394 cap-sd-highspeed;
395 cap-mmc-highspeed;
396 max-frequency = <120000000>;
400 exti: interrupt-controller@58000000 {
401 compatible = "st,stm32h7-exti";
402 interrupt-controller;
403 #interrupt-cells = <2>;
409 compatible = "st,stm32-syscfg", "syscon";
414 #address-cells = <1>;
415 #size-cells = <0>;
416 compatible = "st,stm32h7-spi";
424 i2c4: i2c@58001c00 {
425 compatible = "st,stm32f7-i2c";
426 #address-cells = <1>;
427 #size-cells = <0>;
437 #address-cells = <1>;
438 #size-cells = <0>;
439 compatible = "st,stm32-lptimer";
442 clock-names = "mux";
446 compatible = "st,stm32-pwm-lp";
447 #pwm-cells = <3>;
452 compatible = "st,stm32-lptimer-trigger";
458 compatible = "st,stm32-lptimer-counter";
464 #address-cells = <1>;
465 #size-cells = <0>;
466 compatible = "st,stm32-lptimer";
469 clock-names = "mux";
473 compatible = "st,stm32-pwm-lp";
474 #pwm-cells = <3>;
479 compatible = "st,stm32-lptimer-trigger";
486 compatible = "st,stm32-lptimer";
489 clock-names = "mux";
493 compatible = "st,stm32-pwm-lp";
494 #pwm-cells = <3>;
500 compatible = "st,stm32-lptimer";
503 clock-names = "mux";
507 compatible = "st,stm32-pwm-lp";
508 #pwm-cells = <3>;
514 compatible = "st,stm32-vrefbuf";
517 regulator-min-microvolt = <1500000>;
518 regulator-max-microvolt = <2500000>;
523 compatible = "st,stm32h7-rtc";
526 clock-names = "pclk", "rtc_ck";
527 assigned-clocks = <&rcc RTC_CK>;
528 assigned-clock-parents = <&rcc LSE_CK>;
529 interrupt-parent = <&exti>;
535 rcc: reset-clock-controller@58024400 {
536 compatible = "st,stm32h743-rcc", "st,stm32-rcc";
538 #clock-cells = <1>;
539 #reset-cells = <1>;
544 pwrcfg: power-config@58024800 {
545 compatible = "st,stm32-power-config", "syscon";
550 compatible = "st,stm32h7-adc-core";
554 clock-names = "bus";
555 interrupt-controller;
556 #interrupt-cells = <1>;
557 #address-cells = <1>;
558 #size-cells = <0>;
562 compatible = "st,stm32h7-adc";
563 #io-channel-cells = <1>;
565 interrupt-parent = <&adc_3>;
572 compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
574 reg-names = "stmmaceth";
576 interrupt-names = "macirq";
577 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
585 #address-cells = <1>;
586 #size-cells = <1>;
587 compatible = "st,stm32h743-pinctrl";
589 interrupt-parent = <&exti>;
593 gpio-controller;
594 #gpio-cells = <2>;
597 st,bank-name = "GPIOA";
598 interrupt-controller;
599 #interrupt-cells = <2>;
601 gpio-ranges = <&pinctrl 0 0 16>;
605 gpio-controller;
606 #gpio-cells = <2>;
609 st,bank-name = "GPIOB";
610 interrupt-controller;
611 #interrupt-cells = <2>;
613 gpio-ranges = <&pinctrl 0 16 16>;
617 gpio-controller;
618 #gpio-cells = <2>;
621 st,bank-name = "GPIOC";
622 interrupt-controller;
623 #interrupt-cells = <2>;
625 gpio-ranges = <&pinctrl 0 32 16>;
629 gpio-controller;
630 #gpio-cells = <2>;
633 st,bank-name = "GPIOD";
634 interrupt-controller;
635 #interrupt-cells = <2>;
637 gpio-ranges = <&pinctrl 0 48 16>;
641 gpio-controller;
642 #gpio-cells = <2>;
645 st,bank-name = "GPIOE";
646 interrupt-controller;
647 #interrupt-cells = <2>;
649 gpio-ranges = <&pinctrl 0 64 16>;
653 gpio-controller;
654 #gpio-cells = <2>;
657 st,bank-name = "GPIOF";
658 interrupt-controller;
659 #interrupt-cells = <2>;
661 gpio-ranges = <&pinctrl 0 80 16>;
665 gpio-controller;
666 #gpio-cells = <2>;
669 st,bank-name = "GPIOG";
670 interrupt-controller;
671 #interrupt-cells = <2>;
673 gpio-ranges = <&pinctrl 0 96 16>;
677 gpio-controller;
678 #gpio-cells = <2>;
681 st,bank-name = "GPIOH";
682 interrupt-controller;
683 #interrupt-cells = <2>;
685 gpio-ranges = <&pinctrl 0 112 16>;
689 gpio-controller;
690 #gpio-cells = <2>;
693 st,bank-name = "GPIOI";
694 interrupt-controller;
695 #interrupt-cells = <2>;
697 gpio-ranges = <&pinctrl 0 128 16>;
701 gpio-controller;
702 #gpio-cells = <2>;
705 st,bank-name = "GPIOJ";
706 interrupt-controller;
707 #interrupt-cells = <2>;
709 gpio-ranges = <&pinctrl 0 144 16>;
713 gpio-controller;
714 #gpio-cells = <2>;
717 st,bank-name = "GPIOK";
718 interrupt-controller;
719 #interrupt-cells = <2>;
721 gpio-ranges = <&pinctrl 0 160 8>;
728 clock-frequency = <250000000>;