Lines Matching +full:pwm +full:- +full:gpio
2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
55 compatible = "fixed-clock";
56 clock-frequency = <0>;
59 clk_lse: clk-lse {
60 #clock-cells = <0>;
61 compatible = "fixed-clock";
62 clock-frequency = <32768>;
66 #clock-cells = <0>;
67 compatible = "fixed-clock";
68 clock-frequency = <0>;
74 compatible = "st,stm32-timer";
81 #address-cells = <1>;
82 #size-cells = <0>;
83 compatible = "st,stm32-lptimer";
86 clock-names = "mux";
89 pwm {
90 compatible = "st,stm32-pwm-lp";
91 #pwm-cells = <3>;
96 compatible = "st,stm32-lptimer-trigger";
102 compatible = "st,stm32-lptimer-counter";
108 #address-cells = <1>;
109 #size-cells = <0>;
110 compatible = "st,stm32h7-spi";
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "st,stm32h7-spi";
131 compatible = "st,stm32h7-uart";
139 compatible = "st,stm32h7-uart";
147 compatible = "st,stm32h7-uart";
155 compatible = "st,stm32f7-i2c";
156 #address-cells = <1>;
157 #size-cells = <0>;
167 compatible = "st,stm32f7-i2c";
168 #address-cells = <1>;
169 #size-cells = <0>;
179 compatible = "st,stm32f7-i2c";
180 #address-cells = <1>;
181 #size-cells = <0>;
191 compatible = "st,stm32h7-dac-core";
194 clock-names = "pclk";
195 #address-cells = <1>;
196 #size-cells = <0>;
200 compatible = "st,stm32-dac";
201 #io-channel-cells = <1>;
207 compatible = "st,stm32-dac";
208 #io-channel-cells = <1>;
215 compatible = "st,stm32h7-uart";
223 compatible = "st,stm32h7-uart";
231 #address-cells = <1>;
232 #size-cells = <0>;
233 compatible = "st,stm32h7-spi";
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "st,stm32h7-spi";
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "st,stm32h7-spi";
263 dma1: dma-controller@40020000 {
264 compatible = "st,stm32-dma";
275 #dma-cells = <4>;
277 dma-requests = <8>;
281 dma2: dma-controller@40020400 {
282 compatible = "st,stm32-dma";
293 #dma-cells = <4>;
295 dma-requests = <8>;
299 dmamux1: dma-router@40020800 {
300 compatible = "st,stm32h7-dmamux";
302 #dma-cells = <3>;
303 dma-channels = <16>;
304 dma-requests = <128>;
305 dma-masters = <&dma1 &dma2>;
310 compatible = "st,stm32h7-adc-core";
314 clock-names = "bus";
315 interrupt-controller;
316 #interrupt-cells = <1>;
317 #address-cells = <1>;
318 #size-cells = <0>;
322 compatible = "st,stm32h7-adc";
323 #io-channel-cells = <1>;
325 interrupt-parent = <&adc_12>;
331 compatible = "st,stm32h7-adc";
332 #io-channel-cells = <1>;
334 interrupt-parent = <&adc_12>;
341 compatible = "st,stm32f7-hsotg";
345 clock-names = "otg";
346 g-rx-fifo-size = <256>;
347 g-np-tx-fifo-size = <32>;
348 g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
353 compatible = "st,stm32f4x9-fsotg";
357 clock-names = "otg";
361 ltdc: display-controller@50001000 {
362 compatible = "st,stm32-ltdc";
367 clock-names = "lcd";
371 mdma1: dma-controller@52000000 {
372 compatible = "st,stm32h7-mdma";
376 #dma-cells = <5>;
377 dma-channels = <16>;
378 dma-requests = <32>;
383 arm,primecell-periphid = <0x10153180>;
387 clock-names = "apb_pclk";
389 cap-sd-highspeed;
390 cap-mmc-highspeed;
391 max-frequency = <120000000>;
396 arm,primecell-periphid = <0x10153180>;
400 clock-names = "apb_pclk";
402 cap-sd-highspeed;
403 cap-mmc-highspeed;
404 max-frequency = <120000000>;
408 exti: interrupt-controller@58000000 {
409 compatible = "st,stm32h7-exti";
410 interrupt-controller;
411 #interrupt-cells = <2>;
417 compatible = "st,stm32-syscfg", "syscon";
422 #address-cells = <1>;
423 #size-cells = <0>;
424 compatible = "st,stm32h7-spi";
433 compatible = "st,stm32f7-i2c";
434 #address-cells = <1>;
435 #size-cells = <0>;
445 #address-cells = <1>;
446 #size-cells = <0>;
447 compatible = "st,stm32-lptimer";
450 clock-names = "mux";
453 pwm {
454 compatible = "st,stm32-pwm-lp";
455 #pwm-cells = <3>;
460 compatible = "st,stm32-lptimer-trigger";
466 compatible = "st,stm32-lptimer-counter";
472 #address-cells = <1>;
473 #size-cells = <0>;
474 compatible = "st,stm32-lptimer";
477 clock-names = "mux";
480 pwm {
481 compatible = "st,stm32-pwm-lp";
482 #pwm-cells = <3>;
487 compatible = "st,stm32-lptimer-trigger";
494 compatible = "st,stm32-lptimer";
497 clock-names = "mux";
500 pwm {
501 compatible = "st,stm32-pwm-lp";
502 #pwm-cells = <3>;
508 compatible = "st,stm32-lptimer";
511 clock-names = "mux";
514 pwm {
515 compatible = "st,stm32-pwm-lp";
516 #pwm-cells = <3>;
522 compatible = "st,stm32-vrefbuf";
525 regulator-min-microvolt = <1500000>;
526 regulator-max-microvolt = <2500000>;
531 compatible = "st,stm32h7-rtc";
534 clock-names = "pclk", "rtc_ck";
535 assigned-clocks = <&rcc RTC_CK>;
536 assigned-clock-parents = <&rcc LSE_CK>;
537 interrupt-parent = <&exti>;
543 rcc: reset-clock-controller@58024400 {
544 compatible = "st,stm32h743-rcc", "st,stm32-rcc";
546 #clock-cells = <1>;
547 #reset-cells = <1>;
552 pwrcfg: power-config@58024800 {
553 compatible = "st,stm32-power-config", "syscon";
558 compatible = "st,stm32h7-adc-core";
562 clock-names = "bus";
563 interrupt-controller;
564 #interrupt-cells = <1>;
565 #address-cells = <1>;
566 #size-cells = <0>;
570 compatible = "st,stm32h7-adc";
571 #io-channel-cells = <1>;
573 interrupt-parent = <&adc_3>;
580 compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
582 reg-names = "stmmaceth";
584 interrupt-names = "macirq";
585 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
593 #address-cells = <1>;
594 #size-cells = <1>;
595 compatible = "st,stm32h743-pinctrl";
597 interrupt-parent = <&exti>;
600 gpioa: gpio@58020000 {
601 gpio-controller;
602 #gpio-cells = <2>;
605 st,bank-name = "GPIOA";
606 interrupt-controller;
607 #interrupt-cells = <2>;
609 gpio-ranges = <&pinctrl 0 0 16>;
612 gpiob: gpio@58020400 {
613 gpio-controller;
614 #gpio-cells = <2>;
617 st,bank-name = "GPIOB";
618 interrupt-controller;
619 #interrupt-cells = <2>;
621 gpio-ranges = <&pinctrl 0 16 16>;
624 gpioc: gpio@58020800 {
625 gpio-controller;
626 #gpio-cells = <2>;
629 st,bank-name = "GPIOC";
630 interrupt-controller;
631 #interrupt-cells = <2>;
633 gpio-ranges = <&pinctrl 0 32 16>;
636 gpiod: gpio@58020c00 {
637 gpio-controller;
638 #gpio-cells = <2>;
641 st,bank-name = "GPIOD";
642 interrupt-controller;
643 #interrupt-cells = <2>;
645 gpio-ranges = <&pinctrl 0 48 16>;
648 gpioe: gpio@58021000 {
649 gpio-controller;
650 #gpio-cells = <2>;
653 st,bank-name = "GPIOE";
654 interrupt-controller;
655 #interrupt-cells = <2>;
657 gpio-ranges = <&pinctrl 0 64 16>;
660 gpiof: gpio@58021400 {
661 gpio-controller;
662 #gpio-cells = <2>;
665 st,bank-name = "GPIOF";
666 interrupt-controller;
667 #interrupt-cells = <2>;
669 gpio-ranges = <&pinctrl 0 80 16>;
672 gpiog: gpio@58021800 {
673 gpio-controller;
674 #gpio-cells = <2>;
677 st,bank-name = "GPIOG";
678 interrupt-controller;
679 #interrupt-cells = <2>;
681 gpio-ranges = <&pinctrl 0 96 16>;
684 gpioh: gpio@58021c00 {
685 gpio-controller;
686 #gpio-cells = <2>;
689 st,bank-name = "GPIOH";
690 interrupt-controller;
691 #interrupt-cells = <2>;
693 gpio-ranges = <&pinctrl 0 112 16>;
696 gpioi: gpio@58022000 {
697 gpio-controller;
698 #gpio-cells = <2>;
701 st,bank-name = "GPIOI";
702 interrupt-controller;
703 #interrupt-cells = <2>;
705 gpio-ranges = <&pinctrl 0 128 16>;
708 gpioj: gpio@58022400 {
709 gpio-controller;
710 #gpio-cells = <2>;
713 st,bank-name = "GPIOJ";
714 interrupt-controller;
715 #interrupt-cells = <2>;
717 gpio-ranges = <&pinctrl 0 144 16>;
720 gpiok: gpio@58022800 {
721 gpio-controller;
722 #gpio-cells = <2>;
725 st,bank-name = "GPIOK";
726 interrupt-controller;
727 #interrupt-cells = <2>;
729 gpio-ranges = <&pinctrl 0 160 8>;
736 clock-frequency = <250000000>;