Lines Matching +full:0 +full:- +full:9 +full:a +full:- +full:b
2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
47 i2c1_pins_a: i2c1-0 {
49 pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */
50 <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */
51 bias-disable;
52 drive-open-drain;
53 slew-rate = <0>;
57 ethernet_rmii: rmii-0 {
64 <STM32_PINMUX('A', 7, AF11)>,
66 <STM32_PINMUX('A', 2, AF11)>,
67 <STM32_PINMUX('A', 1, AF11)>;
68 slew-rate = <2>;
72 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
75 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
80 slew-rate = <3>;
81 drive-push-pull;
82 bias-disable;
86 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
89 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
93 slew-rate = <3>;
94 drive-push-pull;
95 bias-disable;
99 slew-rate = <3>;
100 drive-open-drain;
101 bias-disable;
105 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
108 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
116 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
120 <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */
121 slew-rate = <3>;
122 drive-push-pull;
123 bias-pull-up;
126 pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
127 bias-pull-up;
131 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
135 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
136 <STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */
140 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
142 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC1_D0 */
143 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */
144 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */
145 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */
148 slew-rate = <3>;
149 drive-push-pull;
150 bias-disable;
154 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
156 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
157 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */
158 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */
159 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */
161 slew-rate = <3>;
162 drive-push-pull;
163 bias-disable;
167 slew-rate = <3>;
168 drive-open-drain;
169 bias-disable;
173 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
175 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC1_D0 */
176 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC1_D1 */
177 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC1_D2 */
178 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC1_D3 */
184 spi1_pins: spi1-0 {
186 pinmux = <STM32_PINMUX('A', 5, AF5)>,
188 <STM32_PINMUX('B', 5, AF5)>;
190 bias-disable;
191 drive-push-pull;
192 slew-rate = <2>;
195 pinmux = <STM32_PINMUX('G', 9, AF5)>;
197 bias-disable;
201 uart4_pins_a: uart4-0 {
203 pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
204 bias-disable;
205 drive-push-pull;
206 slew-rate = <0>;
209 pinmux = <STM32_PINMUX('I', 9, AF8)>; /* UART4_RX */
210 bias-disable;
214 uart8_pins_a: uart8-0 {
217 bias-disable;
218 drive-push-pull;
219 slew-rate = <0>;
222 pinmux = <STM32_PINMUX('J', 9, AF8)>; /* UART8_RX */
223 bias-disable;
227 usart1_pins_a: usart1-0 {
229 pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
230 bias-disable;
231 drive-push-pull;
232 slew-rate = <0>;
235 pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */
236 bias-disable;
240 usart1_pins_b: usart1-1 {
242 pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
243 bias-disable;
244 drive-push-pull;
245 slew-rate = <0>;
248 pinmux = <STM32_PINMUX('A', 10, AF7)>; /* USART1_RX */
249 bias-disable;
253 usart2_pins_a: usart2-0 {
256 bias-disable;
257 drive-push-pull;
258 slew-rate = <0>;
262 bias-disable;
266 usart3_pins_a: usart3-0 {
268 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
270 bias-disable;
271 drive-push-pull;
272 slew-rate = <0>;
275 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
277 bias-disable;
281 usbotg_hs_pins_a: usbotg-hs-0 {
285 <STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */
286 <STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */
287 <STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */
288 <STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */
289 <STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */
290 <STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */
291 <STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */
292 <STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */
293 <STM32_PINMUX('B', 13, AF10)>, /* ULPI_D6> */
294 <STM32_PINMUX('B', 5, AF10)>; /* ULPI_D7> */
295 bias-disable;
296 drive-push-pull;
297 slew-rate = <2>;