Lines Matching +full:1 +full:c00

49 	#address-cells = <1>;
50 	#size-cells = <1>;
80 			#address-cells = <1>;
94 			timer@1 {
96 				reg = <1>;
102 			#address-cells = <1>;
124 			#address-cells = <1>;
145 		timers5: timers@40000c00 {
146 			#address-cells = <1>;
168 			#address-cells = <1>;
184 			#address-cells = <1>;
200 			#address-cells = <1>;
221 		timers13: timers@40001c00 {
250 			#address-cells = <1>;
255 			clocks = <&rcc 1 CLK_LPTIMER>;
285 			clocks = <&rcc 1 CLK_RTC>;
286 			assigned-clocks = <&rcc 1 CLK_RTC>;
287 			assigned-clock-parents = <&rcc 1 CLK_LSE>;
289 			interrupts = <17 1>;
295 			#address-cells = <1>;
304 		spi3: spi@40003c00 {
305 			#address-cells = <1>;
318 			clocks = <&rcc 1 CLK_USART2>;
326 			clocks = <&rcc 1 CLK_USART3>;
330 		usart4: serial@40004c00 {
334 			clocks = <&rcc 1 CLK_UART4>;
342 			clocks = <&rcc 1 CLK_UART5>;
352 			clocks = <&rcc 1 CLK_I2C1>;
353 			#address-cells = <1>;
364 			clocks = <&rcc 1 CLK_I2C2>;
365 			#address-cells = <1>;
370 		i2c3: i2c@40005c00 {
376 			clocks = <&rcc 1 CLK_I2C3>;
377 			#address-cells = <1>;
388 			clocks = <&rcc 1 CLK_I2C4>;
389 			#address-cells = <1>;
424 		cec: cec@40006c00 {
428 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(CEC)>, <&rcc 1 CLK_HDMI_CEC>;
437 			clocks = <&rcc 1 CLK_UART7>;
441 		usart8: serial@40007c00 {
445 			clocks = <&rcc 1 CLK_UART8>;
450 			#address-cells = <1>;
472 			#address-cells = <1>;
497 			clocks = <&rcc 1 CLK_USART1>;
505 			clocks = <&rcc 1 CLK_USART6>;
509 		sdio2: mmc@40011c00 {
520 		sdio1: mmc@40012c00 {
532 			#address-cells = <1>;
542 			#address-cells = <1>;
557 		exti: interrupt-controller@40013c00 {
562 			interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>;
566 			#address-cells = <1>;
616 			#address-cells = <1>;
626 			#address-cells = <1>;
640 			clocks = <&rcc 1 CLK_LCD>;
658 			#reset-cells = <1>;
664 			assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
725 	clocks = <&rcc 1 0>;