Lines Matching +full:out +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "st-pincfg.h"
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /* 0-5: PIO_SBC */
18 /* 10-19: PIO_FRONT0 */
31 /* 30-35: PIO_REAR */
38 /* 40-42: PIO_FLASH */
45 pin-controller-sbc@961f080 {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 compatible = "st,stih407-sbc-pinctrl";
51 reg-names = "irqmux";
53 interrupt-names = "irqmux";
57 gpio-controller;
58 #gpio-cells = <2>;
59 interrupt-controller;
60 #interrupt-cells = <2>;
62 st,bank-name = "PIO0";
65 gpio-controller;
66 #gpio-cells = <2>;
67 interrupt-controller;
68 #interrupt-cells = <2>;
70 st,bank-name = "PIO1";
73 gpio-controller;
74 #gpio-cells = <2>;
75 interrupt-controller;
76 #interrupt-cells = <2>;
78 st,bank-name = "PIO2";
81 gpio-controller;
82 #gpio-cells = <2>;
83 interrupt-controller;
84 #interrupt-cells = <2>;
86 st,bank-name = "PIO3";
89 gpio-controller;
90 #gpio-cells = <2>;
91 interrupt-controller;
92 #interrupt-cells = <2>;
94 st,bank-name = "PIO4";
98 gpio-controller;
99 #gpio-cells = <2>;
100 interrupt-controller;
101 #interrupt-cells = <2>;
103 st,bank-name = "PIO5";
104 st,retime-pin-mask = <0x3f>;
108 pinctrl_cec0_default: cec0-default {
130 tx = <&pio4 2 ALT2 OUT>;
136 tx_od = <&pio4 3 ALT2 OUT>;
141 /* SBC_ASC0 - UART10 */
143 pinctrl_sbc_serial0: sbc_serial0-0 {
145 tx = <&pio3 4 ALT1 OUT>;
150 /* SBC_ASC1 - UART11 */
152 pinctrl_sbc_serial1: sbc_serial1-0 {
154 tx = <&pio2 6 ALT3 OUT>;
161 pinctrl_i2c10_default: i2c10-default {
170 pinctrl_i2c11_default: i2c11-default {
186 keyout0 = <&pio4 6 ALT4 OUT>;
187 keyout1 = <&pio1 7 ALT2 OUT>;
188 keyout2 = <&pio0 6 ALT2 OUT>;
189 keyout3 = <&pio2 7 ALT2 OUT>;
200 * standard PHY transceiver on-board).
202 pinctrl_rgmii1: rgmii1-0 {
205 txd0 = <&pio0 0 ALT1 OUT DE_IO 0 CLK_A>;
206 txd1 = <&pio0 1 ALT1 OUT DE_IO 0 CLK_A>;
207 txd2 = <&pio0 2 ALT1 OUT DE_IO 0 CLK_A>;
208 txd3 = <&pio0 3 ALT1 OUT DE_IO 0 CLK_A>;
209 txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>;
218 phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>;
222 pinctrl_rgmii1_mdio: rgmii1-mdio {
224 mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
225 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
230 pinctrl_rgmii1_mdio_1: rgmii1-mdio-1 {
232 mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
233 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
239 txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
240 txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
241 txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
242 txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
243 txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
244 txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
248 mdio = <&pio1 0 ALT1 OUT BYPASS 1500>;
249 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
260 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
264 pinctrl_rmii1: rmii1-0 {
266 txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
267 txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
268 txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
269 mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
270 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
281 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
293 pinctrl_pwm1_chan0_default: pwm1-0-default {
295 pwm-out = <&pio3 0 ALT1 OUT>;
296 pwm-capturein = <&pio3 2 ALT1 IN>;
299 pinctrl_pwm1_chan1_default: pwm1-1-default {
301 pwm-capturein = <&pio4 3 ALT1 IN>;
302 pwm-out = <&pio4 4 ALT1 OUT>;
305 pinctrl_pwm1_chan2_default: pwm1-2-default {
307 pwm-out = <&pio4 6 ALT3 OUT>;
310 pinctrl_pwm1_chan3_default: pwm1-3-default {
312 pwm-out = <&pio4 7 ALT3 OUT>;
318 pinctrl_spi10_default: spi10-4w-alt1-0 {
320 mtsr = <&pio4 6 ALT1 OUT>;
322 scl = <&pio4 5 ALT1 OUT>;
326 pinctrl_spi10_3w_alt1_0: spi10-3w-alt1-0 {
329 scl = <&pio4 5 ALT1 OUT>;
335 pinctrl_spi11_default: spi11-4w-alt2-0 {
337 mtsr = <&pio3 1 ALT2 OUT>;
339 scl = <&pio3 2 ALT2 OUT>;
343 pinctrl_spi11_3w_alt2_0: spi11-3w-alt2-0 {
346 scl = <&pio3 2 ALT2 OUT>;
352 pinctrl_spi12_default: spi12-4w-alt2-0 {
354 mtsr = <&pio3 6 ALT2 OUT>;
356 scl = <&pio3 7 ALT2 OUT>;
360 pinctrl_spi12_3w_alt2_0: spi12-3w-alt2-0 {
363 scl = <&pio3 7 ALT2 OUT>;
369 pin-controller-front0@920f080 {
370 #address-cells = <1>;
371 #size-cells = <1>;
372 compatible = "st,stih407-front-pinctrl";
375 reg-names = "irqmux";
377 interrupt-names = "irqmux";
381 gpio-controller;
382 #gpio-cells = <2>;
383 interrupt-controller;
384 #interrupt-cells = <2>;
386 st,bank-name = "PIO10";
389 gpio-controller;
390 #gpio-cells = <2>;
391 interrupt-controller;
392 #interrupt-cells = <2>;
394 st,bank-name = "PIO11";
397 gpio-controller;
398 #gpio-cells = <2>;
399 interrupt-controller;
400 #interrupt-cells = <2>;
402 st,bank-name = "PIO12";
405 gpio-controller;
406 #gpio-cells = <2>;
407 interrupt-controller;
408 #interrupt-cells = <2>;
410 st,bank-name = "PIO13";
413 gpio-controller;
414 #gpio-cells = <2>;
415 interrupt-controller;
416 #interrupt-cells = <2>;
418 st,bank-name = "PIO14";
421 gpio-controller;
422 #gpio-cells = <2>;
423 interrupt-controller;
424 #interrupt-cells = <2>;
426 st,bank-name = "PIO15";
429 gpio-controller;
430 #gpio-cells = <2>;
431 interrupt-controller;
432 #interrupt-cells = <2>;
434 st,bank-name = "PIO16";
437 gpio-controller;
438 #gpio-cells = <2>;
439 interrupt-controller;
440 #interrupt-cells = <2>;
442 st,bank-name = "PIO17";
445 gpio-controller;
446 #gpio-cells = <2>;
447 interrupt-controller;
448 #interrupt-cells = <2>;
450 st,bank-name = "PIO18";
453 gpio-controller;
454 #gpio-cells = <2>;
455 interrupt-controller;
456 #interrupt-cells = <2>;
458 st,bank-name = "PIO19";
463 pinctrl_serial0: serial0-0 {
465 tx = <&pio17 0 ALT1 OUT>;
469 pinctrl_serial0_hw_flowctrl: serial0-0_hw_flowctrl {
471 tx = <&pio17 0 ALT1 OUT>;
474 rts = <&pio17 3 ALT1 OUT>;
480 pinctrl_serial1: serial1-0 {
482 tx = <&pio16 0 ALT1 OUT>;
489 pinctrl_serial2: serial2-0 {
491 tx = <&pio15 0 ALT1 OUT>;
498 pinctrl_sd1: sd1-0 {
506 sd_led = <&pio16 6 ALT6 OUT>;
507 sd_pwren = <&pio16 7 ALT6 OUT>;
516 pinctrl_i2c0_default: i2c0-default {
525 pinctrl_i2c1_default: i2c1-default {
534 pinctrl_i2c2_default: i2c2-default {
541 pinctrl_i2c2_alt2_1: i2c2-alt2-1 {
550 pinctrl_i2c3_default: i2c3-alt1-0 {
556 pinctrl_i2c3_alt1_1: i2c3-alt1-1 {
562 pinctrl_i2c3_alt3_0: i2c3-alt3-0 {
571 pinctrl_spi0_default: spi0-4w-alt2-0 {
573 mtsr = <&pio10 6 ALT2 OUT>;
575 scl = <&pio10 5 ALT2 OUT>;
579 pinctrl_spi0_3w_alt2_0: spi0-3w-alt2-0 {
582 scl = <&pio10 5 ALT2 OUT>;
586 pinctrl_spi0_4w_alt1_0: spi0-4w-alt1-0 {
588 mtsr = <&pio19 7 ALT1 OUT>;
590 scl = <&pio19 6 ALT1 OUT>;
594 pinctrl_spi0_3w_alt1_0: spi0-3w-alt1-0 {
597 scl = <&pio19 6 ALT1 OUT>;
603 pinctrl_spi1_default: spi1-4w-alt2-0 {
605 mtsr = <&pio11 1 ALT2 OUT>;
607 scl = <&pio11 0 ALT2 OUT>;
611 pinctrl_spi1_3w_alt2_0: spi1-3w-alt2-0 {
614 scl = <&pio11 0 ALT2 OUT>;
618 pinctrl_spi1_4w_alt1_0: spi1-4w-alt1-0 {
620 mtsr = <&pio14 3 ALT1 OUT>;
622 scl = <&pio14 2 ALT1 OUT>;
626 pinctrl_spi1_3w_alt1_0: spi1-3w-alt1-0 {
629 scl = <&pio14 2 ALT1 OUT>;
635 pinctrl_spi2_default: spi2-4w-alt2-0 {
637 mtsr = <&pio12 6 ALT2 OUT>;
639 scl = <&pio12 5 ALT2 OUT>;
643 pinctrl_spi2_3w_alt2_0: spi2-3w-alt2-0 {
646 scl = <&pio12 5 ALT2 OUT>;
650 pinctrl_spi2_4w_alt1_0: spi2-4w-alt1-0 {
652 mtsr = <&pio14 6 ALT1 OUT>;
654 scl = <&pio14 5 ALT1 OUT>;
658 pinctrl_spi2_3w_alt1_0: spi2-3w-alt1-0 {
661 scl = <&pio14 5 ALT1 OUT>;
665 pinctrl_spi2_4w_alt2_1: spi2-4w-alt2-1 {
667 mtsr = <&pio15 6 ALT2 OUT>;
669 scl = <&pio15 5 ALT2 OUT>;
673 pinctrl_spi2_3w_alt2_1: spi2-3w-alt2-1 {
676 scl = <&pio15 5 ALT2 OUT>;
682 pinctrl_spi3_default: spi3-4w-alt3-0 {
684 mtsr = <&pio13 6 ALT3 OUT>;
686 scl = <&pio13 5 ALT3 OUT>;
690 pinctrl_spi3_3w_alt3_0: spi3-3w-alt3-0 {
693 scl = <&pio13 5 ALT3 OUT>;
697 pinctrl_spi3_4w_alt1_0: spi3-4w-alt1-0 {
699 mtsr = <&pio17 7 ALT1 OUT>;
701 scl = <&pio17 6 ALT1 OUT>;
705 pinctrl_spi3_3w_alt1_0: spi3-3w-alt1-0 {
708 scl = <&pio17 6 ALT1 OUT>;
712 pinctrl_spi3_4w_alt1_1: spi3-4w-alt1-1 {
714 mtsr = <&pio18 6 ALT1 OUT>;
716 scl = <&pio18 5 ALT1 OUT>;
720 pinctrl_spi3_3w_alt1_1: spi3-3w-alt1-1 {
723 scl = <&pio18 5 ALT1 OUT>;
860 DATA7 = <&pio12 0 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
861 DATA6 = <&pio12 1 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
862 DATA5 = <&pio12 2 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
863 DATA4 = <&pio12 3 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
864 DATA3 = <&pio12 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
865 DATA2 = <&pio12 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
866 DATA1 = <&pio12 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
867 DATA0 = <&pio12 7 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
868 CLKIN = <&pio11 7 ALT3 OUT NICLK 0 CLK_A>;
869 VALID = <&pio11 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
870 ERROR = <&pio11 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
871 PKCLK = <&pio11 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
876 DATA7 = <&pio12 0 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
877 CLKIN = <&pio11 7 ALT3 OUT NICLK 0 CLK_A>;
878 VALID = <&pio11 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
879 ERROR = <&pio11 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
880 PKCLK = <&pio11 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
888 DATA7 = <&pio19 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
889 CLKIN = <&pio19 3 ALT1 OUT NICLK 0 CLK_A>;
890 VALID = <&pio19 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
891 ERROR = <&pio19 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
892 PKCLK = <&pio19 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
917 pinctrl_systrace_default: systrace-default {
919 trc_data0 = <&pio11 3 ALT5 OUT>;
920 trc_data1 = <&pio11 4 ALT5 OUT>;
921 trc_data2 = <&pio11 5 ALT5 OUT>;
922 trc_data3 = <&pio11 6 ALT5 OUT>;
923 trc_clk = <&pio11 7 ALT5 OUT>;
929 pin-controller-front1@921f080 {
930 #address-cells = <1>;
931 #size-cells = <1>;
932 compatible = "st,stih407-front-pinctrl";
935 reg-names = "irqmux";
937 interrupt-names = "irqmux";
941 gpio-controller;
942 #gpio-cells = <2>;
943 interrupt-controller;
944 #interrupt-cells = <2>;
946 st,bank-name = "PIO20";
962 pin-controller-rear@922f080 {
963 #address-cells = <1>;
964 #size-cells = <1>;
965 compatible = "st,stih407-rear-pinctrl";
968 reg-names = "irqmux";
970 interrupt-names = "irqmux";
974 gpio-controller;
975 #gpio-cells = <2>;
976 interrupt-controller;
977 #interrupt-cells = <2>;
979 st,bank-name = "PIO30";
982 gpio-controller;
983 #gpio-cells = <2>;
984 interrupt-controller;
985 #interrupt-cells = <2>;
987 st,bank-name = "PIO31";
990 gpio-controller;
991 #gpio-cells = <2>;
992 interrupt-controller;
993 #interrupt-cells = <2>;
995 st,bank-name = "PIO32";
998 gpio-controller;
999 #gpio-cells = <2>;
1000 interrupt-controller;
1001 #interrupt-cells = <2>;
1003 st,bank-name = "PIO33";
1006 gpio-controller;
1007 #gpio-cells = <2>;
1008 interrupt-controller;
1009 #interrupt-cells = <2>;
1011 st,bank-name = "PIO34";
1014 gpio-controller;
1015 #gpio-cells = <2>;
1016 interrupt-controller;
1017 #interrupt-cells = <2>;
1019 st,bank-name = "PIO35";
1020 st,retime-pin-mask = <0x7f>;
1024 pinctrl_i2c4_default: i2c4-default {
1033 pinctrl_i2c5_default: i2c5-default {
1042 pinctrl_usb3: usb3-2 {
1044 usb-oc-detect = <&pio35 4 ALT1 IN>;
1045 usb-pwr-enable = <&pio35 5 ALT1 OUT>;
1046 usb-vbus-valid = <&pio35 6 ALT1 IN>;
1052 pinctrl_pwm0_chan0_default: pwm0-0-default {
1054 pwm-capturein = <&pio31 0 ALT1 IN>;
1055 pwm-out = <&pio31 1 ALT1 OUT>;
1061 pinctrl_spi4_default: spi4-4w-alt1-0 {
1063 mtsr = <&pio30 1 ALT1 OUT>;
1065 scl = <&pio30 0 ALT1 OUT>;
1069 pinctrl_spi4_3w_alt1_0: spi4-3w-alt1-0 {
1072 scl = <&pio30 0 ALT1 OUT>;
1076 pinctrl_spi4_4w_alt3_0: spi4-4w-alt3-0 {
1078 mtsr = <&pio34 1 ALT3 OUT>;
1080 scl = <&pio34 0 ALT3 OUT>;
1084 pinctrl_spi4_3w_alt3_0: spi4-3w-alt3-0 {
1087 scl = <&pio34 0 ALT3 OUT>;
1095 mclk = <&pio33 5 ALT1 OUT>;
1096 lrclk = <&pio33 7 ALT1 OUT>;
1097 sclk = <&pio33 6 ALT1 OUT>;
1098 data0 = <&pio33 4 ALT1 OUT>;
1099 data1 = <&pio34 0 ALT1 OUT>;
1100 data2 = <&pio34 1 ALT1 OUT>;
1101 data3 = <&pio34 2 ALT1 OUT>;
1107 mclk = <&pio33 5 ALT1 OUT>;
1108 lrclk = <&pio33 7 ALT1 OUT>;
1109 sclk = <&pio33 6 ALT1 OUT>;
1110 data0 = <&pio33 4 ALT1 OUT>;
1142 spdif_out = <&pio34 7 ALT1 OUT>;
1148 pinctrl_serial3: serial3-0 {
1150 tx = <&pio31 3 ALT1 OUT>;
1157 pin-controller-flash@923f080 {
1158 #address-cells = <1>;
1159 #size-cells = <1>;
1160 compatible = "st,stih407-flash-pinctrl";
1163 reg-names = "irqmux";
1165 interrupt-names = "irqmux";
1169 gpio-controller;
1170 #gpio-cells = <2>;
1171 interrupt-controller;
1172 #interrupt-cells = <2>;
1174 st,bank-name = "PIO40";
1177 gpio-controller;
1178 #gpio-cells = <2>;
1179 interrupt-controller;
1180 #interrupt-cells = <2>;
1182 st,bank-name = "PIO41";
1185 gpio-controller;
1186 #gpio-cells = <2>;
1187 interrupt-controller;
1188 #interrupt-cells = <2>;
1190 st,bank-name = "PIO42";
1194 pinctrl_mmc0: mmc0-0 {
1208 pinctrl_sd0: sd0-0 {
1216 sd_led = <&pio42 0 ALT2 OUT>;
1217 sd_pwren = <&pio42 2 ALT2 OUT>;
1218 sd_vsel = <&pio42 3 ALT2 OUT>;
1228 spi-fsm-clk = <&pio40 1 ALT1 OUT>;
1229 spi-fsm-cs = <&pio40 0 ALT1 OUT>;
1230 spi-fsm-mosi = <&pio40 2 ALT1 OUT>;
1231 spi-fsm-miso = <&pio40 3 ALT1 IN>;
1232 spi-fsm-hol = <&pio40 5 ALT1 OUT>;
1233 spi-fsm-wp = <&pio40 4 ALT1 OUT>;
1241 nand_cs1 = <&pio40 6 ALT3 OUT>;
1242 nand_cs0 = <&pio40 7 ALT3 OUT>;
1251 nand_we = <&pio42 0 ALT3 OUT>;
1252 nand_dqs = <&pio42 1 ALT3 OUT>;
1253 nand_ale = <&pio42 2 ALT3 OUT>;
1254 nand_cle = <&pio42 3 ALT3 OUT>;
1256 nand_oe = <&pio42 5 ALT3 OUT>;