Lines Matching +full:0 +full:x61840000
19 #size-cells = <0>;
21 cpu0: cpu@0 {
24 reg = <0>;
112 #clock-cells = <0>;
117 #clock-cells = <0>;
163 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
164 <0x506c0000 0x400>;
179 reg = <0x54006000 0x100>;
181 #size-cells = <0>;
184 pinctrl-0 = <&pinctrl_spi0>;
192 reg = <0x54006100 0x100>;
194 #size-cells = <0>;
197 pinctrl-0 = <&pinctrl_spi1>;
205 reg = <0x54006800 0x40>;
208 pinctrl-0 = <&pinctrl_uart0>;
209 clocks = <&peri_clk 0>;
210 resets = <&peri_rst 0>;
216 reg = <0x54006900 0x40>;
219 pinctrl-0 = <&pinctrl_uart1>;
227 reg = <0x54006a00 0x40>;
230 pinctrl-0 = <&pinctrl_uart2>;
238 reg = <0x54006b00 0x40>;
241 pinctrl-0 = <&pinctrl_uart3>;
248 reg = <0x55000000 0x200>;
254 gpio-ranges = <&pinctrl 0 0 0>,
255 <&pinctrl 96 0 0>;
259 socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
265 reg = <0x56000000 0x80000>;
268 pinctrl-0 = <&pinctrl_ain1>,
282 i2s_port0: port@0 {
321 reg = <0x58780000 0x80>;
323 #size-cells = <0>;
326 pinctrl-0 = <&pinctrl_i2c0>;
335 reg = <0x58781000 0x80>;
337 #size-cells = <0>;
340 pinctrl-0 = <&pinctrl_i2c1>;
349 reg = <0x58782000 0x80>;
351 #size-cells = <0>;
354 pinctrl-0 = <&pinctrl_i2c2>;
363 reg = <0x58783000 0x80>;
365 #size-cells = <0>;
368 pinctrl-0 = <&pinctrl_i2c3>;
377 reg = <0x58784000 0x80>;
379 #size-cells = <0>;
389 reg = <0x58785000 0x80>;
391 #size-cells = <0>;
401 reg = <0x58786000 0x80>;
403 #size-cells = <0>;
413 reg = <0x58c00000 0x400>;
417 pinctrl-0 = <&pinctrl_system_bus>;
422 reg = <0x59801000 0x400>;
428 reg = <0x59810000 0x400>;
444 reg = <0x59820000 0x200>;
460 reg = <0x5a000000 0x800>;
463 pinctrl-0 = <&pinctrl_emmc>;
476 reg = <0x5a400000 0x800>;
479 pinctrl-0 = <&pinctrl_sd>;
481 clocks = <&sd_clk 0>;
483 resets = <&sd_rst 0>;
489 socionext,syscon-uhs-mode = <&sdctrl 0>;
495 reg = <0x5f800000 0x2000>;
505 reg = <0x5f900000 0x2000>;
508 ranges = <0 0x5f900000 0x2000>;
512 reg = <0x100 0x28>;
517 reg = <0x200 0x58>;
523 reg = <0x5fc10000 0x5300>;
531 reg = <0x5fc20000 0x200>;
538 reg = <0x60000200 0x20>;
540 (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_HIGH)>;
546 reg = <0x60000600 0x20>;
548 (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_HIGH)>;
554 reg = <0x60001000 0x1000>,
555 <0x60000100 0x100>;
563 reg = <0x61840000 0x10000>;
578 #thermal-sensor-cells = <0>;
579 socionext,tmod-calibration = <0x0f86 0x6844>;
586 reg = <0x65000000 0x8500>;
589 pinctrl-0 = <&pinctrl_ether_rgmii>;
596 socionext,syscon-phy-mode = <&soc_glue 0>;
600 #size-cells = <0>;
608 reg = <0x65600000 0x10000>;
611 resets = <&sys_rst 28>, <&ahci_rst 0>;
619 reg = <0x65700000 0x100>;
622 ranges = <0 0x65700000 0x100>;
624 ahci_rst: reset-controller@0 {
626 reg = <0x0 0x4>;
636 reg = <0x10 0x10>;
641 #phy-cells = <0>;
648 reg = <0x65a00000 0xcd00>;
652 pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
664 reg = <0x65b00000 0x400>;
667 ranges = <0 0x65b00000 0x400>;
669 usb0_rst: reset-controller@0 {
671 reg = <0x0 0x4>;
681 reg = <0x100 0x10>;
690 reg = <0x110 0x10>;
699 reg = <0x200 0x10>;
700 #phy-cells = <0>;
710 reg = <0x210 0x10>;
711 #phy-cells = <0>;
721 reg = <0x300 0x10>;
722 #phy-cells = <0>;
732 reg = <0x310 0x10>;
733 #phy-cells = <0>;
745 reg = <0x65c00000 0xcd00>;
749 pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
760 reg = <0x65d00000 0x400>;
763 ranges = <0 0x65d00000 0x400>;
765 usb1_rst: reset-controller@0 {
767 reg = <0x0 0x4>;
777 reg = <0x100 0x10>;
786 reg = <0x110 0x10>;
795 reg = <0x200 0x10>;
796 #phy-cells = <0>;
806 reg = <0x210 0x10>;
807 #phy-cells = <0>;
817 reg = <0x300 0x10>;
818 #phy-cells = <0>;
831 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
833 #size-cells = <0>;
836 pinctrl-0 = <&pinctrl_nand>;