Lines Matching +full:0 +full:x5f800000
18 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
45 #clock-cells = <0>;
50 #clock-cells = <0>;
65 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
66 <0x506c0000 0x400>;
79 reg = <0x54006000 0x100>;
81 #size-cells = <0>;
84 pinctrl-0 = <&pinctrl_spi0>;
92 reg = <0x54006800 0x40>;
95 pinctrl-0 = <&pinctrl_uart0>;
96 clocks = <&peri_clk 0>;
97 resets = <&peri_rst 0>;
103 reg = <0x54006900 0x40>;
106 pinctrl-0 = <&pinctrl_uart1>;
114 reg = <0x54006a00 0x40>;
117 pinctrl-0 = <&pinctrl_uart2>;
125 reg = <0x54006b00 0x40>;
128 pinctrl-0 = <&pinctrl_uart3>;
135 reg = <0x55000000 0x200>;
141 gpio-ranges = <&pinctrl 0 0 0>;
144 socionext,interrupt-ranges = <0 48 16>, <16 154 5>;
150 reg = <0x58780000 0x80>;
152 #size-cells = <0>;
155 pinctrl-0 = <&pinctrl_i2c0>;
164 reg = <0x58781000 0x80>;
166 #size-cells = <0>;
169 pinctrl-0 = <&pinctrl_i2c1>;
178 reg = <0x58782000 0x80>;
180 #size-cells = <0>;
183 pinctrl-0 = <&pinctrl_i2c2>;
192 reg = <0x58783000 0x80>;
194 #size-cells = <0>;
197 pinctrl-0 = <&pinctrl_i2c3>;
208 reg = <0x58785000 0x80>;
210 #size-cells = <0>;
220 reg = <0x58786000 0x80>;
222 #size-cells = <0>;
232 reg = <0x58c00000 0x400>;
236 pinctrl-0 = <&pinctrl_system_bus>;
241 reg = <0x59801000 0x400>;
247 reg = <0x59810000 0x800>;
263 reg = <0x59820000 0x200>;
278 reg = <0x5a000000 0x1000>;
295 reg = <0x5a400000 0x200>;
298 pinctrl-0 = <&pinctrl_sd>;
300 clocks = <&mio_clk 0>;
302 resets = <&mio_rst 0>, <&mio_rst 3>;
310 socionext,syscon-uhs-mode = <&mioctrl 0>;
316 reg = <0x5a500000 0x200>;
319 pinctrl-0 = <&pinctrl_emmc>;
334 reg = <0x5a600000 0x200>;
337 pinctrl-0 = <&pinctrl_sd1>;
350 reg = <0x5a800100 0x100>;
353 pinctrl-0 = <&pinctrl_usb2>;
366 reg = <0x5a810100 0x100>;
369 pinctrl-0 = <&pinctrl_usb3>;
382 reg = <0x5f800000 0x2000>;
391 #size-cells = <0>;
393 usb_phy0: phy@0 {
394 reg = <0>;
395 #phy-cells = <0>;
400 #phy-cells = <0>;
405 #phy-cells = <0>;
411 #phy-cells = <0>;
425 reg = <0x5f900000 0x2000>;
428 ranges = <0 0x5f900000 0x2000>;
432 reg = <0x100 0x28>;
437 reg = <0x130 0x8>;
442 reg = <0x200 0x14>;
448 reg = <0x5fc10000 0x5300>;
456 reg = <0x5fc20000 0x200>;
463 reg = <0x60000200 0x20>;
471 reg = <0x60000600 0x20>;
479 reg = <0x60001000 0x1000>,
480 <0x60000100 0x100>;
488 reg = <0x61840000 0x10000>;
504 reg = <0x65000000 0x8500>;
507 pinctrl-0 = <&pinctrl_ether_rgmii>;
515 socionext,syscon-phy-mode = <&soc_glue 0>;
519 #size-cells = <0>;
527 reg = <0x65600000 0x10000>;
533 assigned-clocks = <&sg_clk 0>;
540 reg = <0x65700000 0x100>;
543 ranges = <0 0x65700000 0x100>;
545 ahci0_rst: reset-controller@0 {
547 reg = <0x0 0x4>;
557 reg = <0x10 0x40>;
564 <&ahci0_rst 0>, <&ahci0_rst 1>,
566 #phy-cells = <0>;
574 reg = <0x65800000 0x10000>;
580 assigned-clocks = <&sg_clk 0>;
587 reg = <0x65900000 0x100>;
590 ranges = <0 0x65900000 0x100>;
592 ahci1_rst: reset-controller@0 {
594 reg = <0x0 0x4>;
604 reg = <0x10 0x40>;
611 <&ahci1_rst 0>, <&ahci1_rst 1>,
613 #phy-cells = <0>;
620 reg = <0x65a00000 0xcd00>;
625 pinctrl-0 = <&pinctrl_usb0>;
636 reg = <0x65b00000 0x100>;
639 ranges = <0 0x65b00000 0x100>;
641 usb0_vbus: regulator@0 {
643 reg = <0 0x10>;
652 reg = <0x10 0x10>;
653 #phy-cells = <0>;
663 reg = <0x40 0x4>;
675 reg = <0x65c00000 0xcd00>;
680 pinctrl-0 = <&pinctrl_usb1>;
691 reg = <0x65d00000 0x100>;
694 ranges = <0 0x65d00000 0x100>;
696 usb1_vbus: regulator@0 {
698 reg = <0 0x10>;
707 reg = <0x40 0x4>;
720 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
722 #size-cells = <0>;
725 pinctrl-0 = <&pinctrl_nand>;