Lines Matching +full:exynos5 +full:- +full:gsc
1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 compatible = "samsung,exynos5420", "samsung,exynos5";
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
51 bus_fsys: bus-fsys {
52 compatible = "samsung,exynos-bus";
54 clock-names = "bus";
58 bus_fsys2: bus-fsys2 {
59 compatible = "samsung,exynos-bus";
61 clock-names = "bus";
65 bus_fsys_apb: bus-fsys-apb {
66 compatible = "samsung,exynos-bus";
68 clock-names = "bus";
72 bus_g2d: bus-g2d {
73 compatible = "samsung,exynos-bus";
75 clock-names = "bus";
79 bus_g2d_acp: bus-g2d-acp {
80 compatible = "samsung,exynos-bus";
82 clock-names = "bus";
85 bus_gen: bus-gen {
86 compatible = "samsung,exynos-bus";
88 clock-names = "bus";
92 bus_gscl_scaler: bus-gscl-scaler {
93 compatible = "samsung,exynos-bus";
95 clock-names = "bus";
99 bus_jpeg: bus-jpeg {
100 compatible = "samsung,exynos-bus";
102 clock-names = "bus";
106 bus_jpeg_apb: bus-jpeg-apb {
107 compatible = "samsung,exynos-bus";
109 clock-names = "bus";
113 bus_mfc: bus-mfc {
114 compatible = "samsung,exynos-bus";
116 clock-names = "bus";
120 bus_mscl: bus-mscl {
121 compatible = "samsung,exynos-bus";
123 clock-names = "bus";
127 bus_noc: bus-noc {
128 compatible = "samsung,exynos-bus";
130 clock-names = "bus";
134 bus_peri: bus-peri {
135 compatible = "samsung,exynos-bus";
137 clock-names = "bus";
141 bus_wcore: bus-wcore {
142 compatible = "samsung,exynos-bus";
144 clock-names = "bus";
150 * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.
153 cluster_a15_opp_table: opp-table-0 {
154 compatible = "operating-points-v2";
155 opp-shared;
157 opp-1800000000 {
158 opp-hz = /bits/ 64 <1800000000>;
159 opp-microvolt = <1250000 1250000 1500000>;
160 clock-latency-ns = <140000>;
162 opp-1700000000 {
163 opp-hz = /bits/ 64 <1700000000>;
164 opp-microvolt = <1212500 1212500 1500000>;
165 clock-latency-ns = <140000>;
167 opp-1600000000 {
168 opp-hz = /bits/ 64 <1600000000>;
169 opp-microvolt = <1175000 1175000 1500000>;
170 clock-latency-ns = <140000>;
172 opp-1500000000 {
173 opp-hz = /bits/ 64 <1500000000>;
174 opp-microvolt = <1137500 1137500 1500000>;
175 clock-latency-ns = <140000>;
177 opp-1400000000 {
178 opp-hz = /bits/ 64 <1400000000>;
179 opp-microvolt = <1112500 1112500 1500000>;
180 clock-latency-ns = <140000>;
182 opp-1300000000 {
183 opp-hz = /bits/ 64 <1300000000>;
184 opp-microvolt = <1062500 1062500 1500000>;
185 clock-latency-ns = <140000>;
187 opp-1200000000 {
188 opp-hz = /bits/ 64 <1200000000>;
189 opp-microvolt = <1037500 1037500 1500000>;
190 clock-latency-ns = <140000>;
192 opp-1100000000 {
193 opp-hz = /bits/ 64 <1100000000>;
194 opp-microvolt = <1012500 1012500 1500000>;
195 clock-latency-ns = <140000>;
197 opp-1000000000 {
198 opp-hz = /bits/ 64 <1000000000>;
199 opp-microvolt = < 987500 987500 1500000>;
200 clock-latency-ns = <140000>;
202 opp-900000000 {
203 opp-hz = /bits/ 64 <900000000>;
204 opp-microvolt = < 962500 962500 1500000>;
205 clock-latency-ns = <140000>;
207 opp-800000000 {
208 opp-hz = /bits/ 64 <800000000>;
209 opp-microvolt = < 937500 937500 1500000>;
210 clock-latency-ns = <140000>;
212 opp-700000000 {
213 opp-hz = /bits/ 64 <700000000>;
214 opp-microvolt = < 912500 912500 1500000>;
215 clock-latency-ns = <140000>;
219 cluster_a7_opp_table: opp-table-1 {
220 compatible = "operating-points-v2";
221 opp-shared;
223 opp-1300000000 {
224 opp-hz = /bits/ 64 <1300000000>;
225 opp-microvolt = <1275000>;
226 clock-latency-ns = <140000>;
228 opp-1200000000 {
229 opp-hz = /bits/ 64 <1200000000>;
230 opp-microvolt = <1212500>;
231 clock-latency-ns = <140000>;
233 opp-1100000000 {
234 opp-hz = /bits/ 64 <1100000000>;
235 opp-microvolt = <1162500>;
236 clock-latency-ns = <140000>;
238 opp-1000000000 {
239 opp-hz = /bits/ 64 <1000000000>;
240 opp-microvolt = <1112500>;
241 clock-latency-ns = <140000>;
243 opp-900000000 {
244 opp-hz = /bits/ 64 <900000000>;
245 opp-microvolt = <1062500>;
246 clock-latency-ns = <140000>;
248 opp-800000000 {
249 opp-hz = /bits/ 64 <800000000>;
250 opp-microvolt = <1025000>;
251 clock-latency-ns = <140000>;
253 opp-700000000 {
254 opp-hz = /bits/ 64 <700000000>;
255 opp-microvolt = <975000>;
256 clock-latency-ns = <140000>;
258 opp-600000000 {
259 opp-hz = /bits/ 64 <600000000>;
260 opp-microvolt = <937500>;
261 clock-latency-ns = <140000>;
267 compatible = "arm,cci-400";
268 #address-cells = <1>;
269 #size-cells = <1>;
273 cci_control0: slave-if@4000 {
274 compatible = "arm,cci-400-ctrl-if";
275 interface-type = "ace";
278 cci_control1: slave-if@5000 {
279 compatible = "arm,cci-400-ctrl-if";
280 interface-type = "ace";
285 clock: clock-controller@10010000 {
286 compatible = "samsung,exynos5420-clock", "syscon";
288 #clock-cells = <1>;
291 clock_audss: audss-clock-controller@3810000 {
292 compatible = "samsung,exynos5420-audss-clock";
294 #clock-cells = <1>;
297 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
298 power-domains = <&mau_pd>;
302 compatible = "samsung,mfc-v7";
306 clock-names = "mfc";
307 power-domains = <&mfc_pd>;
309 iommu-names = "left", "right";
313 compatible = "samsung,exynos5420-dw-mshc-smu";
315 #address-cells = <1>;
316 #size-cells = <0>;
319 clock-names = "biu", "ciu";
320 fifo-depth = <0x40>;
325 compatible = "samsung,exynos5420-dw-mshc-smu";
327 #address-cells = <1>;
328 #size-cells = <0>;
331 clock-names = "biu", "ciu";
332 fifo-depth = <0x40>;
337 compatible = "samsung,exynos5420-dw-mshc";
339 #address-cells = <1>;
340 #size-cells = <0>;
343 clock-names = "biu", "ciu";
344 fifo-depth = <0x40>;
348 dmc: memory-controller@10c20000 {
349 compatible = "samsung,exynos5422-dmc";
359 clock-names = "fout_spll",
367 samsung,syscon-clk = <&clock>;
372 compatible = "samsung,exynos5420-nocp";
378 compatible = "samsung,exynos5420-nocp";
384 compatible = "samsung,exynos5420-nocp";
390 compatible = "samsung,exynos5420-nocp";
396 compatible = "samsung,exynos5420-nocp";
402 compatible = "samsung,exynos5420-nocp";
408 compatible = "samsung,exynos-ppmu";
411 clock-names = "ppmu";
413 ppmu_event3_dmc0_0: ppmu-event3-dmc0-0 {
414 event-name = "ppmu-event3-dmc0-0";
420 compatible = "samsung,exynos-ppmu";
423 clock-names = "ppmu";
425 ppmu_event3_dmc0_1: ppmu-event3-dmc0-1 {
426 event-name = "ppmu-event3-dmc0-1";
432 compatible = "samsung,exynos-ppmu";
435 clock-names = "ppmu";
437 ppmu_event3_dmc1_0: ppmu-event3-dmc1-0 {
438 event-name = "ppmu-event3-dmc1-0";
444 compatible = "samsung,exynos-ppmu";
447 clock-names = "ppmu";
449 ppmu_event3_dmc1_1: ppmu-event3-dmc1-1 {
450 event-name = "ppmu-event3-dmc1-1";
455 gsc_pd: power-domain@10044000 {
456 compatible = "samsung,exynos4210-pd";
458 #power-domain-cells = <0>;
459 label = "GSC";
462 isp_pd: power-domain@10044020 {
463 compatible = "samsung,exynos4210-pd";
465 #power-domain-cells = <0>;
469 mfc_pd: power-domain@10044060 {
470 compatible = "samsung,exynos4210-pd";
472 #power-domain-cells = <0>;
476 g3d_pd: power-domain@10044080 {
477 compatible = "samsung,exynos4210-pd";
479 #power-domain-cells = <0>;
483 disp_pd: power-domain@100440c0 {
484 compatible = "samsung,exynos4210-pd";
486 #power-domain-cells = <0>;
490 mau_pd: power-domain@100440e0 {
491 compatible = "samsung,exynos4210-pd";
493 #power-domain-cells = <0>;
497 msc_pd: power-domain@10044120 {
498 compatible = "samsung,exynos4210-pd";
500 #power-domain-cells = <0>;
505 compatible = "samsung,exynos5420-pinctrl";
509 wakeup-interrupt-controller {
510 compatible = "samsung,exynos4210-wakeup-eint";
511 interrupt-parent = <&gic>;
517 compatible = "samsung,exynos5420-pinctrl";
523 compatible = "samsung,exynos5420-pinctrl";
529 compatible = "samsung,exynos5420-pinctrl";
535 compatible = "samsung,exynos5420-pinctrl";
538 power-domains = <&mau_pd>;
541 adma: dma-controller@3880000 {
546 clock-names = "apb_pclk";
547 #dma-cells = <1>;
548 power-domains = <&mau_pd>;
551 pdma0: dma-controller@121a0000 {
556 clock-names = "apb_pclk";
557 #dma-cells = <1>;
560 pdma1: dma-controller@121b0000 {
565 clock-names = "apb_pclk";
566 #dma-cells = <1>;
569 mdma0: dma-controller@10800000 {
574 clock-names = "apb_pclk";
575 #dma-cells = <1>;
578 mdma1: dma-controller@11c10000 {
583 clock-names = "apb_pclk";
584 #dma-cells = <1>;
586 * MDMA1 can support both secure and non-secure
596 compatible = "samsung,exynos5420-i2s";
601 dma-names = "tx", "rx", "tx-sec";
605 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
606 #clock-cells = <1>;
607 clock-output-names = "i2s_cdclk0";
608 #sound-dai-cells = <1>;
609 samsung,idma-addr = <0x03000000>;
610 pinctrl-names = "default";
611 pinctrl-0 = <&i2s0_bus>;
612 power-domains = <&mau_pd>;
617 compatible = "samsung,exynos5420-i2s";
621 dma-names = "tx", "rx";
623 clock-names = "iis", "i2s_opclk0";
624 #clock-cells = <1>;
625 clock-output-names = "i2s_cdclk1";
626 #sound-dai-cells = <1>;
627 pinctrl-names = "default";
628 pinctrl-0 = <&i2s1_bus>;
633 compatible = "samsung,exynos5420-i2s";
637 dma-names = "tx", "rx";
639 clock-names = "iis", "i2s_opclk0";
640 #clock-cells = <1>;
641 clock-output-names = "i2s_cdclk2";
642 #sound-dai-cells = <1>;
643 pinctrl-names = "default";
644 pinctrl-0 = <&i2s2_bus>;
649 compatible = "samsung,exynos4210-spi";
654 dma-names = "tx", "rx";
655 #address-cells = <1>;
656 #size-cells = <0>;
657 pinctrl-names = "default";
658 pinctrl-0 = <&spi0_bus>;
660 clock-names = "spi", "spi_busclk0";
661 fifo-depth = <256>;
666 compatible = "samsung,exynos4210-spi";
671 dma-names = "tx", "rx";
672 #address-cells = <1>;
673 #size-cells = <0>;
674 pinctrl-names = "default";
675 pinctrl-0 = <&spi1_bus>;
677 clock-names = "spi", "spi_busclk0";
678 fifo-depth = <64>;
683 compatible = "samsung,exynos4210-spi";
688 dma-names = "tx", "rx";
689 #address-cells = <1>;
690 #size-cells = <0>;
691 pinctrl-names = "default";
692 pinctrl-0 = <&spi2_bus>;
694 clock-names = "spi", "spi_busclk0";
695 fifo-depth = <64>;
700 compatible = "samsung,exynos5410-mipi-dsi";
704 phy-names = "dsim";
706 clock-names = "bus_clk", "pll_clk";
707 #address-cells = <1>;
708 #size-cells = <0>;
713 compatible = "samsung,exynos5250-hsi2c";
716 #address-cells = <1>;
717 #size-cells = <0>;
718 pinctrl-names = "default";
719 pinctrl-0 = <&i2c8_hs_bus>;
721 clock-names = "hsi2c";
726 compatible = "samsung,exynos5250-hsi2c";
729 #address-cells = <1>;
730 #size-cells = <0>;
731 pinctrl-names = "default";
732 pinctrl-0 = <&i2c9_hs_bus>;
734 clock-names = "hsi2c";
739 compatible = "samsung,exynos5250-hsi2c";
742 #address-cells = <1>;
743 #size-cells = <0>;
744 pinctrl-names = "default";
745 pinctrl-0 = <&i2c10_hs_bus>;
747 clock-names = "hsi2c";
752 compatible = "samsung,exynos5420-hdmi";
758 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
761 samsung,syscon-phandle = <&pmu_system_controller>;
763 power-domains = <&disp_pd>;
764 #sound-dai-cells = <0>;
767 hdmiphy: hdmi-phy@145d0000 {
772 compatible = "samsung,s5p-cec";
776 clock-names = "hdmicec";
777 samsung,syscon-phandle = <&pmu_system_controller>;
778 hdmi-phandle = <&hdmi>;
779 pinctrl-names = "default";
780 pinctrl-0 = <&hdmi_cec>;
785 compatible = "samsung,exynos5420-mixer";
790 clock-names = "mixer", "hdmi", "sclk_hdmi";
791 power-domains = <&disp_pd>;
797 compatible = "samsung,exynos5250-rotator";
801 clock-names = "rotator";
805 gsc_0: video-scaler@13e00000 {
806 compatible = "samsung,exynos5420-gsc", "samsung,exynos5-gsc";
810 clock-names = "gscl";
811 power-domains = <&gsc_pd>;
815 gsc_1: video-scaler@13e10000 {
816 compatible = "samsung,exynos5420-gsc", "samsung,exynos5-gsc";
820 clock-names = "gscl";
821 power-domains = <&gsc_pd>;
826 compatible = "samsung,exynos5420-mali", "arm,mali-t628";
831 interrupt-names = "job", "mmu", "gpu";
834 clock-names = "core";
835 power-domains = <&g3d_pd>;
836 operating-points-v2 = <&gpu_opp_table>;
839 #cooling-cells = <2>;
841 gpu_opp_table: opp-table {
842 compatible = "operating-points-v2";
844 opp-177000000 {
845 opp-hz = /bits/ 64 <177000000>;
846 opp-microvolt = <812500>;
848 opp-266000000 {
849 opp-hz = /bits/ 64 <266000000>;
850 opp-microvolt = <862500>;
852 opp-350000000 {
853 opp-hz = /bits/ 64 <350000000>;
854 opp-microvolt = <912500>;
856 opp-420000000 {
857 opp-hz = /bits/ 64 <420000000>;
858 opp-microvolt = <962500>;
860 opp-480000000 {
861 opp-hz = /bits/ 64 <480000000>;
862 opp-microvolt = <1000000>;
864 opp-543000000 {
865 opp-hz = /bits/ 64 <543000000>;
866 opp-microvolt = <1037500>;
868 opp-600000000 {
869 opp-hz = /bits/ 64 <600000000>;
870 opp-microvolt = <1150000>;
876 compatible = "samsung,exynos5420-scaler";
880 clock-names = "mscl";
881 power-domains = <&msc_pd>;
886 compatible = "samsung,exynos5420-scaler";
890 clock-names = "mscl";
891 power-domains = <&msc_pd>;
896 compatible = "samsung,exynos5420-scaler";
900 clock-names = "mscl";
901 power-domains = <&msc_pd>;
906 compatible = "samsung,exynos5420-jpeg";
909 clock-names = "jpeg";
915 compatible = "samsung,exynos5420-jpeg";
918 clock-names = "jpeg";
923 pmu_system_controller: system-controller@10040000 {
924 compatible = "samsung,exynos5420-pmu", "simple-mfd", "syscon";
926 clock-names = "clkout16";
928 #clock-cells = <1>;
929 interrupt-controller;
930 #interrupt-cells = <3>;
931 interrupt-parent = <&gic>;
933 dp_phy: dp-phy {
934 compatible = "samsung,exynos5420-dp-video-phy";
935 #phy-cells = <0>;
938 mipi_phy: mipi-phy {
939 compatible = "samsung,exynos5420-mipi-video-phy";
940 #phy-cells = <1>;
945 compatible = "samsung,exynos5420-tmu";
949 clock-names = "tmu_apbif";
950 #thermal-sensor-cells = <0>;
954 compatible = "samsung,exynos5420-tmu";
958 clock-names = "tmu_apbif";
959 #thermal-sensor-cells = <0>;
963 compatible = "samsung,exynos5420-tmu-ext-triminfo";
967 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
968 #thermal-sensor-cells = <0>;
972 compatible = "samsung,exynos5420-tmu-ext-triminfo";
976 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
977 #thermal-sensor-cells = <0>;
981 compatible = "samsung,exynos5420-tmu-ext-triminfo";
985 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
986 #thermal-sensor-cells = <0>;
990 compatible = "samsung,exynos-sysmmu";
992 interrupt-parent = <&combiner>;
994 clock-names = "sysmmu", "master";
996 #iommu-cells = <0>;
1000 compatible = "samsung,exynos-sysmmu";
1002 interrupt-parent = <&combiner>;
1004 clock-names = "sysmmu", "master";
1006 #iommu-cells = <0>;
1010 compatible = "samsung,exynos-sysmmu";
1012 interrupt-parent = <&combiner>;
1014 clock-names = "sysmmu", "master";
1016 power-domains = <&disp_pd>;
1017 #iommu-cells = <0>;
1021 compatible = "samsung,exynos-sysmmu";
1023 interrupt-parent = <&combiner>;
1025 clock-names = "sysmmu", "master";
1027 power-domains = <&gsc_pd>;
1028 #iommu-cells = <0>;
1032 compatible = "samsung,exynos-sysmmu";
1034 interrupt-parent = <&combiner>;
1036 clock-names = "sysmmu", "master";
1038 power-domains = <&gsc_pd>;
1039 #iommu-cells = <0>;
1043 compatible = "samsung,exynos-sysmmu";
1045 interrupt-parent = <&combiner>;
1047 clock-names = "sysmmu", "master";
1049 power-domains = <&msc_pd>;
1050 #iommu-cells = <0>;
1054 compatible = "samsung,exynos-sysmmu";
1057 clock-names = "sysmmu", "master";
1059 power-domains = <&msc_pd>;
1060 #iommu-cells = <0>;
1064 compatible = "samsung,exynos-sysmmu";
1067 clock-names = "sysmmu", "master";
1069 power-domains = <&msc_pd>;
1070 #iommu-cells = <0>;
1074 compatible = "samsung,exynos-sysmmu";
1076 interrupt-parent = <&combiner>;
1078 clock-names = "sysmmu", "master";
1080 power-domains = <&msc_pd>;
1081 #iommu-cells = <0>;
1085 compatible = "samsung,exynos-sysmmu";
1087 interrupt-parent = <&combiner>;
1089 clock-names = "sysmmu", "master";
1091 power-domains = <&msc_pd>;
1092 #iommu-cells = <0>;
1096 compatible = "samsung,exynos-sysmmu";
1098 interrupt-parent = <&combiner>;
1100 clock-names = "sysmmu", "master";
1102 power-domains = <&msc_pd>;
1103 #iommu-cells = <0>;
1107 compatible = "samsung,exynos-sysmmu";
1109 interrupt-parent = <&combiner>;
1111 clock-names = "sysmmu", "master";
1113 #iommu-cells = <0>;
1117 compatible = "samsung,exynos-sysmmu";
1119 interrupt-parent = <&combiner>;
1121 clock-names = "sysmmu", "master";
1123 #iommu-cells = <0>;
1127 compatible = "samsung,exynos-sysmmu";
1130 clock-names = "sysmmu", "master";
1132 #iommu-cells = <0>;
1136 compatible = "samsung,exynos-sysmmu";
1138 interrupt-parent = <&combiner>;
1140 clock-names = "sysmmu", "master";
1142 power-domains = <&mfc_pd>;
1143 #iommu-cells = <0>;
1147 compatible = "samsung,exynos-sysmmu";
1149 interrupt-parent = <&combiner>;
1151 clock-names = "sysmmu", "master";
1153 power-domains = <&mfc_pd>;
1154 #iommu-cells = <0>;
1158 compatible = "samsung,exynos-sysmmu";
1160 interrupt-parent = <&combiner>;
1162 clock-names = "sysmmu", "master";
1164 power-domains = <&disp_pd>;
1165 #iommu-cells = <0>;
1169 compatible = "samsung,exynos-sysmmu";
1171 interrupt-parent = <&combiner>;
1173 clock-names = "sysmmu", "master";
1175 power-domains = <&disp_pd>;
1176 #iommu-cells = <0>;
1180 thermal-zones {
1181 cpu0_thermal: cpu0-thermal {
1182 thermal-sensors = <&tmu_cpu0>;
1183 #include "exynos5420-trip-points.dtsi"
1185 cpu1_thermal: cpu1-thermal {
1186 thermal-sensors = <&tmu_cpu1>;
1187 #include "exynos5420-trip-points.dtsi"
1189 cpu2_thermal: cpu2-thermal {
1190 thermal-sensors = <&tmu_cpu2>;
1191 #include "exynos5420-trip-points.dtsi"
1193 cpu3_thermal: cpu3-thermal {
1194 thermal-sensors = <&tmu_cpu3>;
1195 #include "exynos5420-trip-points.dtsi"
1197 gpu_thermal: gpu-thermal {
1198 thermal-sensors = <&tmu_gpu>;
1199 #include "exynos5420-trip-points.dtsi"
1206 clock-names = "adc";
1207 samsung,syscon-phandle = <&pmu_system_controller>;
1212 clock-names = "dp";
1214 phy-names = "dp";
1215 power-domains = <&disp_pd>;
1219 compatible = "samsung,exynos5420-fimd";
1221 clock-names = "sclk_fimd", "fimd";
1222 power-domains = <&disp_pd>;
1224 iommu-names = "m0", "m1";
1230 clock-names = "fimg2d";
1236 clock-names = "i2c";
1237 pinctrl-names = "default";
1238 pinctrl-0 = <&i2c0_bus>;
1243 clock-names = "i2c";
1244 pinctrl-names = "default";
1245 pinctrl-0 = <&i2c1_bus>;
1250 clock-names = "i2c";
1251 pinctrl-names = "default";
1252 pinctrl-0 = <&i2c2_bus>;
1257 clock-names = "i2c";
1258 pinctrl-names = "default";
1259 pinctrl-0 = <&i2c3_bus>;
1264 clock-names = "hsi2c";
1265 pinctrl-names = "default";
1266 pinctrl-0 = <&i2c4_hs_bus>;
1271 clock-names = "hsi2c";
1272 pinctrl-names = "default";
1273 pinctrl-0 = <&i2c5_hs_bus>;
1278 clock-names = "hsi2c";
1279 pinctrl-names = "default";
1280 pinctrl-0 = <&i2c6_hs_bus>;
1285 clock-names = "hsi2c";
1286 pinctrl-names = "default";
1287 pinctrl-0 = <&i2c7_hs_bus>;
1292 clock-names = "fin_pll", "mct";
1297 clock-names = "secss";
1302 clock-names = "timers";
1307 clock-names = "rtc";
1308 interrupt-parent = <&pmu_system_controller>;
1314 clock-names = "uart", "clk_uart_baud0";
1316 dma-names = "rx", "tx";
1321 clock-names = "uart", "clk_uart_baud0";
1323 dma-names = "rx", "tx";
1328 clock-names = "uart", "clk_uart_baud0";
1330 dma-names = "rx", "tx";
1335 clock-names = "uart", "clk_uart_baud0";
1337 dma-names = "rx", "tx";
1342 clock-names = "secss";
1347 clock-names = "secss";
1352 clock-names = "usbdrd30";
1357 clock-names = "phy", "ref";
1358 samsung,pmu-syscon = <&pmu_system_controller>;
1363 clock-names = "usbdrd30";
1372 clock-names = "phy", "ref";
1373 samsung,pmu-syscon = <&pmu_system_controller>;
1378 clock-names = "usbhost";
1383 clock-names = "usbhost";
1388 clock-names = "phy", "ref";
1389 samsung,sysreg-phandle = <&sysreg_system_controller>;
1390 samsung,pmureg-phandle = <&pmu_system_controller>;
1395 clock-names = "watchdog";
1396 samsung,syscon-phandle = <&pmu_system_controller>;
1399 #include "exynos5420-pinctrl.dtsi"
1400 #include "exynos-syscon-restart.dtsi"