Lines Matching +full:opp +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
45 compatible = "arm,cortex-a9";
46 reg = <0xa00>;
48 clock-names = "cpu";
49 operating-points-v2 = <&cpu0_opp_table>;
50 #cooling-cells = <2>; /* min followed by max */
55 compatible = "arm,cortex-a9";
56 reg = <0xa01>;
58 clock-names = "cpu";
59 operating-points-v2 = <&cpu0_opp_table>;
60 #cooling-cells = <2>; /* min followed by max */
65 compatible = "arm,cortex-a9";
66 reg = <0xa02>;
68 clock-names = "cpu";
69 operating-points-v2 = <&cpu0_opp_table>;
70 #cooling-cells = <2>; /* min followed by max */
75 compatible = "arm,cortex-a9";
76 reg = <0xa03>;
78 clock-names = "cpu";
79 operating-points-v2 = <&cpu0_opp_table>;
80 #cooling-cells = <2>; /* min followed by max */
84 cpu0_opp_table: opp-table-0 {
85 compatible = "operating-points-v2";
86 opp-shared;
88 opp-200000000 {
89 opp-hz = /bits/ 64 <200000000>;
90 opp-microvolt = <900000>;
91 clock-latency-ns = <200000>;
93 opp-300000000 {
94 opp-hz = /bits/ 64 <300000000>;
95 opp-microvolt = <900000>;
96 clock-latency-ns = <200000>;
98 opp-400000000 {
99 opp-hz = /bits/ 64 <400000000>;
100 opp-microvolt = <925000>;
101 clock-latency-ns = <200000>;
103 opp-500000000 {
104 opp-hz = /bits/ 64 <500000000>;
105 opp-microvolt = <950000>;
106 clock-latency-ns = <200000>;
108 opp-600000000 {
109 opp-hz = /bits/ 64 <600000000>;
110 opp-microvolt = <975000>;
111 clock-latency-ns = <200000>;
113 opp-700000000 {
114 opp-hz = /bits/ 64 <700000000>;
115 opp-microvolt = <987500>;
116 clock-latency-ns = <200000>;
118 opp-800000000 {
119 opp-hz = /bits/ 64 <800000000>;
120 opp-microvolt = <1000000>;
121 clock-latency-ns = <200000>;
122 opp-suspend;
124 opp-900000000 {
125 opp-hz = /bits/ 64 <900000000>;
126 opp-microvolt = <1037500>;
127 clock-latency-ns = <200000>;
129 opp-1000000000 {
130 opp-hz = /bits/ 64 <1000000000>;
131 opp-microvolt = <1087500>;
132 clock-latency-ns = <200000>;
134 opp-1100000000 {
135 opp-hz = /bits/ 64 <1100000000>;
136 opp-microvolt = <1137500>;
137 clock-latency-ns = <200000>;
139 opp-1200000000 {
140 opp-hz = /bits/ 64 <1200000000>;
141 opp-microvolt = <1187500>;
142 clock-latency-ns = <200000>;
144 opp-1300000000 {
145 opp-hz = /bits/ 64 <1300000000>;
146 opp-microvolt = <1250000>;
147 clock-latency-ns = <200000>;
149 opp-1400000000 {
150 opp-hz = /bits/ 64 <1400000000>;
151 opp-microvolt = <1287500>;
152 clock-latency-ns = <200000>;
154 cpu0_opp_1500: opp-1500000000 {
155 opp-hz = /bits/ 64 <1500000000>;
156 opp-microvolt = <1350000>;
157 clock-latency-ns = <200000>;
158 turbo-mode;
164 compatible = "samsung,exynos4412-clock";
168 samsung,combiner-nr = <20>;
172 cpu-offset = <0x4000>;
177 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
182 compatible = "samsung,exynos4412-pmu", "simple-mfd", "syscon";