Lines Matching +full:opp +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
39 compatible = "arm,cortex-a9";
40 reg = <0xa00>;
42 clock-names = "cpu";
43 operating-points-v2 = <&cpu0_opp_table>;
44 #cooling-cells = <2>; /* min followed by max */
49 compatible = "arm,cortex-a9";
50 reg = <0xa01>;
52 clock-names = "cpu";
53 operating-points-v2 = <&cpu0_opp_table>;
54 #cooling-cells = <2>; /* min followed by max */
58 cpu0_opp_table: opp-table-0 {
59 compatible = "operating-points-v2";
60 opp-shared;
62 opp-200000000 {
63 opp-hz = /bits/ 64 <200000000>;
64 opp-microvolt = <900000>;
65 clock-latency-ns = <200000>;
67 opp-300000000 {
68 opp-hz = /bits/ 64 <300000000>;
69 opp-microvolt = <900000>;
70 clock-latency-ns = <200000>;
72 opp-400000000 {
73 opp-hz = /bits/ 64 <400000000>;
74 opp-microvolt = <925000>;
75 clock-latency-ns = <200000>;
77 opp-500000000 {
78 opp-hz = /bits/ 64 <500000000>;
79 opp-microvolt = <950000>;
80 clock-latency-ns = <200000>;
82 opp-600000000 {
83 opp-hz = /bits/ 64 <600000000>;
84 opp-microvolt = <975000>;
85 clock-latency-ns = <200000>;
87 opp-700000000 {
88 opp-hz = /bits/ 64 <700000000>;
89 opp-microvolt = <987500>;
90 clock-latency-ns = <200000>;
92 opp-800000000 {
93 opp-hz = /bits/ 64 <800000000>;
94 opp-microvolt = <1000000>;
95 clock-latency-ns = <200000>;
96 opp-suspend;
98 opp-900000000 {
99 opp-hz = /bits/ 64 <900000000>;
100 opp-microvolt = <1037500>;
101 clock-latency-ns = <200000>;
103 opp-1000000000 {
104 opp-hz = /bits/ 64 <1000000000>;
105 opp-microvolt = <1087500>;
106 clock-latency-ns = <200000>;
108 opp-1100000000 {
109 opp-hz = /bits/ 64 <1100000000>;
110 opp-microvolt = <1137500>;
111 clock-latency-ns = <200000>;
113 opp-1200000000 {
114 opp-hz = /bits/ 64 <1200000000>;
115 opp-microvolt = <1187500>;
116 clock-latency-ns = <200000>;
118 opp-1300000000 {
119 opp-hz = /bits/ 64 <1300000000>;
120 opp-microvolt = <1250000>;
121 clock-latency-ns = <200000>;
123 opp-1400000000 {
124 opp-hz = /bits/ 64 <1400000000>;
125 opp-microvolt = <1287500>;
126 clock-latency-ns = <200000>;
128 cpu0_opp_1500: opp-1500000000 {
129 opp-hz = /bits/ 64 <1500000000>;
130 opp-microvolt = <1350000>;
131 clock-latency-ns = <200000>;
132 turbo-mode;
138 compatible = "samsung,exynos4212-clock";
142 samsung,combiner-nr = <18>;
146 cpu-offset = <0x8000>;
151 interrupt-affinity = <&cpu0>, <&cpu1>;
156 compatible = "samsung,exynos4212-pmu", "simple-mfd", "syscon";