Lines Matching +full:0 +full:v_lcd
23 reg = <0x40000000 0x10000000
24 0x50000000 0x10000000>;
42 clock-frequency = <0>;
53 #clock-cells = <0>;
76 gpios = <&gpx2 0 GPIO_ACTIVE_LOW>;
132 #size-cells = <0>;
139 lcd@0 {
141 reg = <0>;
161 hsync-active = <0>;
162 vsync-active = <0>;
163 de-active = <0>;
164 pixelclk-active = <0>;
190 #size-cells = <0>;
192 pinctrl-0 = <&i2c_ddc_bus>;
235 assigned-clock-rates = <0>, <160000000>;
243 assigned-clock-rates = <0>, <160000000>;
251 assigned-clock-rates = <0>, <160000000>;
259 assigned-clock-rates = <0>, <160000000>;
263 pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
269 #size-cells = <0>;
286 pinctrl-0 = <&hdmi_hpd>;
304 samsung,i2c-slave-addr = <0x10>;
306 pinctrl-0 = <&i2c3_bus>;
312 reg = <0x4a>;
318 samsung,i2c-slave-addr = <0x10>;
320 pinctrl-0 = <&i2c5_bus>;
326 reg = <0x60>;
330 max8952,default-mode = <0>;
333 max8952,sync-freq = <0>;
334 max8952,ramp-speed = <0>;
345 interrupts-extended = <&gpx0 7 0>, <&gpx2 7 0>;
347 pinctrl-0 = <&lp3974_irq>;
348 reg = <0x66>;
350 max8998,pmic-buck1-default-dvs-idx = <0>;
356 max8998,pmic-buck2-default-dvs-idx = <0>;
357 max8998,pmic-buck2-dvs-gpio = <&gpe2 0 GPIO_ACTIVE_HIGH>;
458 regulator-name = "VCC_3.0V_LCD";
591 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
599 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
610 #size-cells = <0>;
618 pinctrl-0 = <&sd3_clk>, <&sd3_cmd>, <&sd3_bus4>;
633 pinctrl-0 = <&uart0_data &uart0_fctl>;
638 pinctrl-0 = <&bt_shutdown &bt_device_wakeup &bt_host_wakeup>;
667 reg = <0x12840000 0x1000>;
677 smp-sram@0 {
683 reg = <0x5000 0x1000>;