Lines Matching +full:ramp +full:- +full:speed
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
41 wakeup-source;
45 gpio-restart {
46 compatible = "gpio-restart";
48 pinctrl-names = "default";
49 pinctrl-0 = <&ap_warm_reset_h>;
53 emmc_pwrseq: emmc-pwrseq {
54 compatible = "mmc-pwrseq-emmc";
55 pinctrl-0 = <&emmc_reset>;
56 pinctrl-names = "default";
57 reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
60 sdio_pwrseq: sdio-pwrseq {
61 compatible = "mmc-pwrseq-simple";
63 clock-names = "ext_clock";
64 pinctrl-names = "default";
65 pinctrl-0 = <&wifi_enable_h>;
72 * - SDIO_RESET_L_WL_REG_ON
73 * - PDN (power down when low)
75 reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
78 vcc_5v: vcc-5v {
79 compatible = "regulator-fixed";
80 regulator-name = "vcc_5v";
81 regulator-always-on;
82 regulator-boot-on;
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
87 vcc33_sys: vcc33-sys {
88 compatible = "regulator-fixed";
89 regulator-name = "vcc33_sys";
90 regulator-always-on;
91 regulator-boot-on;
92 regulator-min-microvolt = <3300000>;
93 regulator-max-microvolt = <3300000>;
96 vcc50_hdmi: vcc50-hdmi {
97 compatible = "regulator-fixed";
98 regulator-name = "vcc50_hdmi";
99 regulator-always-on;
100 regulator-boot-on;
101 vin-supply = <&vcc_5v>;
104 vdd_logic: vdd-logic {
105 compatible = "pwm-regulator";
106 regulator-name = "vdd_logic";
109 pwm-supply = <&vcc33_sys>;
111 pwm-dutycycle-range = <0x7b 0>;
112 pwm-dutycycle-unit = <0x94>;
114 regulator-always-on;
115 regulator-boot-on;
116 regulator-min-microvolt = <950000>;
117 regulator-max-microvolt = <1350000>;
118 regulator-ramp-delay = <4000>;
123 cpu0-supply = <&vdd_cpu>;
130 /* rk3288-c used in Veyron Chrome-devices has slightly changed OPPs */
132 /delete-node/ opp-312000000;
134 opp-1512000000 {
135 opp-microvolt = <1250000>;
137 opp-1608000000 {
138 opp-microvolt = <1300000>;
140 opp-1704000000 {
141 opp-hz = /bits/ 64 <1704000000>;
142 opp-microvolt = <1350000>;
144 opp-1800000000 {
145 opp-hz = /bits/ 64 <1800000000>;
146 opp-microvolt = <1400000>;
153 bus-width = <8>;
154 cap-mmc-highspeed;
155 rockchip,default-sample-phase = <158>;
156 disable-wp;
157 mmc-hs200-1_8v;
158 mmc-pwrseq = <&emmc_pwrseq>;
159 non-removable;
160 pinctrl-names = "default";
161 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
165 mali-supply = <&vdd_gpu>;
178 pinctrl-names = "default", "unwedge";
179 pinctrl-0 = <&hdmi_ddc>;
180 pinctrl-1 = <&hdmi_ddc_unwedge>;
187 clock-frequency = <400000>;
188 i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */
189 i2c-scl-rising-time-ns = <100>; /* 45ns measured */
194 clock-output-names = "xin32k", "wifibt_32kin";
195 interrupt-parent = <&gpio0>;
197 pinctrl-names = "default";
198 pinctrl-0 = <&pmic_int_l>;
199 rockchip,system-power-controller;
200 wakeup-source;
201 #clock-cells = <1>;
203 vcc1-supply = <&vcc33_sys>;
204 vcc2-supply = <&vcc33_sys>;
205 vcc3-supply = <&vcc33_sys>;
206 vcc4-supply = <&vcc33_sys>;
207 vcc6-supply = <&vcc_5v>;
208 vcc7-supply = <&vcc33_sys>;
209 vcc8-supply = <&vcc33_sys>;
210 vcc12-supply = <&vcc_18>;
211 vddio-supply = <&vcc33_io>;
215 regulator-name = "vdd_arm";
216 regulator-always-on;
217 regulator-boot-on;
218 regulator-min-microvolt = <750000>;
219 regulator-max-microvolt = <1450000>;
220 regulator-ramp-delay = <6001>;
221 regulator-state-mem {
222 regulator-off-in-suspend;
227 regulator-name = "vdd_gpu";
228 regulator-always-on;
229 regulator-boot-on;
230 regulator-min-microvolt = <800000>;
231 regulator-max-microvolt = <1250000>;
232 regulator-ramp-delay = <6001>;
233 regulator-state-mem {
234 regulator-off-in-suspend;
239 regulator-name = "vcc135_ddr";
240 regulator-always-on;
241 regulator-boot-on;
242 regulator-state-mem {
243 regulator-on-in-suspend;
255 regulator-name = "vcc_18";
256 regulator-always-on;
257 regulator-boot-on;
258 regulator-min-microvolt = <1800000>;
259 regulator-max-microvolt = <1800000>;
260 regulator-state-mem {
261 regulator-on-in-suspend;
262 regulator-suspend-microvolt = <1800000>;
274 regulator-name = "vcc33_io";
275 regulator-always-on;
276 regulator-boot-on;
277 regulator-min-microvolt = <3300000>;
278 regulator-max-microvolt = <3300000>;
279 regulator-state-mem {
280 regulator-on-in-suspend;
281 regulator-suspend-microvolt = <3300000>;
286 regulator-name = "vdd_10";
287 regulator-always-on;
288 regulator-boot-on;
289 regulator-min-microvolt = <1000000>;
290 regulator-max-microvolt = <1000000>;
291 regulator-state-mem {
292 regulator-on-in-suspend;
293 regulator-suspend-microvolt = <1000000>;
298 regulator-name = "vdd10_lcd_pwren_h";
299 regulator-always-on;
300 regulator-boot-on;
301 regulator-min-microvolt = <2500000>;
302 regulator-max-microvolt = <2500000>;
303 regulator-state-mem {
304 regulator-off-in-suspend;
309 regulator-name = "vcc33_lcd";
310 regulator-always-on;
311 regulator-boot-on;
312 regulator-state-mem {
313 regulator-off-in-suspend;
323 clock-frequency = <400000>;
324 i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */
325 i2c-scl-rising-time-ns = <100>; /* 40ns measured */
330 powered-while-suspended;
338 clock-frequency = <100000>;
339 i2c-scl-falling-time-ns = <50>; /* 10ns measured */
340 i2c-scl-rising-time-ns = <800>; /* 600ns measured */
346 clock-frequency = <400000>;
347 i2c-scl-falling-time-ns = <50>; /* 11ns measured */
348 i2c-scl-rising-time-ns = <300>; /* 225ns measured */
354 bb-supply = <&vcc33_io>;
355 dvp-supply = <&vcc_18>;
356 flash0-supply = <&vcc18_flashio>;
357 gpio1830-supply = <&vcc33_io>;
358 gpio30-supply = <&vcc33_io>;
359 lcdc-supply = <&vcc33_lcd>;
360 wifi-supply = <&vcc18_wl>;
370 bus-width = <4>;
371 cap-sd-highspeed;
372 cap-sdio-irq;
373 keep-power-in-suspend;
374 mmc-pwrseq = <&sdio_pwrseq>;
375 non-removable;
376 pinctrl-names = "default";
377 pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
378 sd-uhs-sdr12;
379 sd-uhs-sdr25;
380 sd-uhs-sdr50;
381 sd-uhs-sdr104;
382 vmmc-supply = <&vcc33_sys>;
383 vqmmc-supply = <&vcc18_wl>;
389 rx-sample-delay-ns = <12>;
392 compatible = "jedec,spi-nor";
393 spi-max-frequency = <50000000>;
401 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
402 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
403 rockchip,hw-tshut-temp = <125000>;
410 pinctrl-names = "default";
411 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
429 needs-reset-on-resume;
434 snps,need-phy-for-wake;
440 assigned-clocks = <&cru SCLK_USBPHY480M_SRC>;
441 assigned-clock-parents = <&usbphy0>;
443 snps,need-phy-for-wake;
459 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
460 bias-disable;
461 drive-strength = <8>;
464 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
465 bias-pull-up;
466 drive-strength = <8>;
469 pcfg_output_high: pcfg-output-high {
470 output-high;
473 pcfg_output_low: pcfg-output-low {
474 output-low;
478 pwr_key_l: pwr-key-l {
484 emmc_reset: emmc-reset {
489 * We run eMMC at max speed; bump up drive strength.
492 emmc_clk: emmc-clk {
496 emmc_cmd: emmc-cmd {
500 emmc_bus8: emmc-bus8 {
513 pmic_int_l: pmic-int-l {
519 ap_warm_reset_h: ap-warm-reset-h {
524 recovery-switch {
525 rec_mode_l: rec-mode-l {
531 wifi_enable_h: wifienable-h {
536 bt_enable_l: bt-enable-l {
540 bt_host_wake: bt-host-wake {
544 bt_host_wake_l: bt-host-wake-l {
549 * We run sdio0 at max speed; bump up drive strength.
552 sdio0_bus4: sdio0-bus4 {
559 sdio0_cmd: sdio0-cmd {
563 sdio0_clk: sdio0-clk {
573 bt_dev_wake_sleep: bt-dev-wake-sleep {
577 bt_dev_wake_awake: bt-dev-wake-awake {
581 bt_dev_wake: bt-dev-wake {
587 tpm_int_h: tpm-int-h {
592 write-protect {
593 fw_wp_ap: fw-wp-ap {