Lines Matching full:cru
9 #include <dt-bindings/clock/rk3188-cru.h>
27 clocks = <&cru ARMCLK>;
29 resets = <&cru SRST_CORE0>;
37 resets = <&cru SRST_CORE1>;
45 resets = <&cru SRST_CORE2>;
53 resets = <&cru SRST_CORE3>;
119 clocks = <&cru ACLK_LCDC0>, <&cru DCLK_LCDC0>, <&cru HCLK_LCDC0>;
122 resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
136 clocks = <&cru ACLK_LCDC1>, <&cru DCLK_LCDC1>, <&cru HCLK_LCDC1>;
139 resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
153 clocks = <&cru PCLK_TIMER3>, <&cru SCLK_TIMER3>;
161 clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER6>;
171 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
185 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
195 cru: clock-controller@20000000 { label
196 compatible = "rockchip,rk3188-cru";
210 clocks = <&cru PCLK_EFUSE>;
231 clocks = <&cru PCLK_GPIO0>;
244 clocks = <&cru PCLK_GPIO1>;
257 clocks = <&cru PCLK_GPIO2>;
270 clocks = <&cru PCLK_GPIO3>;
657 clocks = <&cru SCLK_OTGPHY0>;
665 clocks = <&cru SCLK_OTGPHY1>;
712 clocks = <&cru ACLK_LCDC0>,
713 <&cru ACLK_LCDC1>,
714 <&cru DCLK_LCDC0>,
715 <&cru DCLK_LCDC1>,
716 <&cru HCLK_LCDC0>,
717 <&cru HCLK_LCDC1>,
718 <&cru SCLK_CIF0>,
719 <&cru ACLK_CIF0>,
720 <&cru HCLK_CIF0>,
721 <&cru ACLK_IPP>,
722 <&cru HCLK_IPP>,
723 <&cru ACLK_RGA>,
724 <&cru HCLK_RGA>;
735 clocks = <&cru ACLK_VDPU>,
736 <&cru ACLK_VEPU>,
737 <&cru HCLK_VDPU>,
738 <&cru HCLK_VEPU>;
745 clocks = <&cru ACLK_GPU>;