Lines Matching +full:reg +full:- +full:io +full:- +full:width
1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
24 reg = <0>;
30 compatible = "arm,cortex-a7";
31 reg = <1>;
33 enable-method = "renesas,r9a06g032-smp";
34 cpu-release-addr = <0 0x4000c204>;
39 #clock-cells = <0>;
40 compatible = "fixed-clock";
41 clock-frequency = <0>;
45 #clock-cells = <0>;
46 compatible = "fixed-clock";
47 clock-frequency = <40000000>;
51 #clock-cells = <0>;
52 compatible = "fixed-clock";
53 clock-frequency = <0>;
57 #clock-cells = <0>;
58 compatible = "fixed-clock";
59 clock-frequency = <0>;
63 compatible = "simple-bus";
64 #address-cells = <1>;
65 #size-cells = <1>;
66 interrupt-parent = <&gic>;
70 compatible = "renesas,r9a06g032-rtc", "renesas,rzn1-rtc";
71 reg = <0x40006000 0x1000>;
75 interrupt-names = "alarm", "timer", "pps";
77 clock-names = "hclk";
78 power-domains = <&sysctrl>;
83 compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
84 reg = <0x40008000 0x1000>;
91 compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
92 reg = <0x40009000 0x1000>;
98 sysctrl: system-controller@4000c000 {
99 compatible = "renesas,r9a06g032-sysctrl";
100 reg = <0x4000c000 0x1000>;
102 #clock-cells = <1>;
103 #power-domain-cells = <0>;
107 clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
108 #address-cells = <1>;
109 #size-cells = <1>;
111 dmamux: dma-router@a0 {
112 compatible = "renesas,rzn1-dmamux";
113 reg = <0xa0 4>;
114 #dma-cells = <6>;
115 dma-requests = <32>;
116 dma-masters = <&dma0 &dma1>;
121 compatible = "renesas,r9a06g032-usbf", "renesas,rzn1-usbf";
122 reg = <0x4001e000 0x2000>;
127 clock-names = "hclkf", "hclkpm";
128 power-domains = <&sysctrl>;
133 compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";
138 clock-names = "hclkh", "hclkpm", "pciclk";
139 power-domains = <&sysctrl>;
140 reg = <0x40030000 0xc00>,
145 bus-range = <0 0>;
146 #address-cells = <3>;
147 #size-cells = <2>;
148 #interrupt-cells = <1>;
152 * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit)
154 dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>;
155 interrupt-map-mask = <0xf800 0 0 0x7>;
156 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
161 reg = <0x800 0 0 0 0>;
163 phy-names = "usb";
167 reg = <0x1000 0 0 0 0>;
169 phy-names = "usb";
174 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
175 reg = <0x40060000 0x400>;
177 reg-shift = <2>;
178 reg-io-width = <4>;
180 clock-names = "baudclk", "apb_pclk";
185 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
186 reg = <0x40061000 0x400>;
188 reg-shift = <2>;
189 reg-io-width = <4>;
191 clock-names = "baudclk", "apb_pclk";
196 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
197 reg = <0x40062000 0x400>;
199 reg-shift = <2>;
200 reg-io-width = <4>;
202 clock-names = "baudclk", "apb_pclk";
207 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
208 reg = <0x50000000 0x400>;
210 reg-shift = <2>;
211 reg-io-width = <4>;
213 clock-names = "baudclk", "apb_pclk";
215 dma-names = "rx", "tx";
220 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
221 reg = <0x50001000 0x400>;
223 reg-shift = <2>;
224 reg-io-width = <4>;
226 clock-names = "baudclk", "apb_pclk";
228 dma-names = "rx", "tx";
233 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
234 reg = <0x50002000 0x400>;
236 reg-shift = <2>;
237 reg-io-width = <4>;
239 clock-names = "baudclk", "apb_pclk";
241 dma-names = "rx", "tx";
246 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
247 reg = <0x50003000 0x400>;
249 reg-shift = <2>;
250 reg-io-width = <4>;
252 clock-names = "baudclk", "apb_pclk";
254 dma-names = "rx", "tx";
259 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
260 reg = <0x50004000 0x400>;
262 reg-shift = <2>;
263 reg-io-width = <4>;
265 clock-names = "baudclk", "apb_pclk";
267 dma-names = "rx", "tx";
272 compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
273 reg = <0x40067000 0x1000>, <0x51000000 0x480>;
275 clock-names = "bus";
279 nand_controller: nand-controller@40102000 {
280 compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";
281 reg = <0x40102000 0x2000>;
284 clock-names = "hclk", "eclk";
285 power-domains = <&sysctrl>;
286 #address-cells = <1>;
287 #size-cells = <0>;
291 dma0: dma-controller@40104000 {
292 compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma";
293 reg = <0x40104000 0x1000>;
295 clock-names = "hclk";
297 dma-channels = <8>;
298 dma-requests = <16>;
299 dma-masters = <1>;
300 #dma-cells = <3>;
302 data-width = <8>;
305 dma1: dma-controller@40105000 {
306 compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma";
307 reg = <0x40105000 0x1000>;
309 clock-names = "hclk";
311 dma-channels = <8>;
312 dma-requests = <16>;
313 dma-masters = <1>;
314 #dma-cells = <3>;
316 data-width = <8>;
320 compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
321 reg = <0x44000000 0x2000>;
325 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
327 clock-names = "stmmaceth";
328 power-domains = <&sysctrl>;
329 snps,multicast-filter-bins = <256>;
330 snps,perfect-filter-entries = <128>;
331 tx-fifo-depth = <2048>;
332 rx-fifo-depth = <4096>;
333 pcs-handle = <&mii_conv1>;
338 compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
339 reg = <0x44002000 0x2000>;
343 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
345 clock-names = "stmmaceth";
346 power-domains = <&sysctrl>;
347 snps,multicast-filter-bins = <256>;
348 snps,perfect-filter-entries = <128>;
349 tx-fifo-depth = <2048>;
350 rx-fifo-depth = <4096>;
354 eth_miic: eth-miic@44030000 {
355 compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
356 #address-cells = <1>;
357 #size-cells = <0>;
358 reg = <0x44030000 0x10000>;
363 clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
364 power-domains = <&sysctrl>;
367 mii_conv1: mii-conv@1 {
368 reg = <1>;
372 mii_conv2: mii-conv@2 {
373 reg = <2>;
377 mii_conv3: mii-conv@3 {
378 reg = <3>;
382 mii_conv4: mii-conv@4 {
383 reg = <4>;
387 mii_conv5: mii-conv@5 {
388 reg = <5>;
394 compatible = "renesas,r9a06g032-a5psw", "renesas,rzn1-a5psw";
395 reg = <0x44050000 0x10000>;
398 clock-names = "hclk", "clk";
399 power-domains = <&sysctrl>;
402 ethernet-ports {
403 #address-cells = <1>;
404 #size-cells = <0>;
407 reg = <0>;
408 pcs-handle = <&mii_conv5>;
413 reg = <1>;
414 pcs-handle = <&mii_conv4>;
419 reg = <2>;
420 pcs-handle = <&mii_conv3>;
425 reg = <3>;
426 pcs-handle = <&mii_conv2>;
431 reg = <4>;
434 phy-mode = "internal";
436 fixed-link {
438 full-duplex;
444 gic: interrupt-controller@44101000 {
445 compatible = "arm,gic-400", "arm,cortex-a7-gic";
446 interrupt-controller;
447 #interrupt-cells = <3>;
448 reg = <0x44101000 0x1000>, /* Distributer */
457 compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
458 reg = <0x52104000 0x800>;
459 reg-io-width = <4>;
462 power-domains = <&sysctrl>;
467 compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
468 reg = <0x52105000 0x800>;
469 reg-io-width = <4>;
472 power-domains = <&sysctrl>;
478 compatible = "arm,armv7-timer";
479 interrupt-parent = <&gic>;
480 arm,cpu-registers-not-fw-configured;
481 always-on;
487 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
490 usbphy: usb-phy {
491 #phy-cells = <0>;
492 compatible = "usb-nop-xceiv";