Lines Matching full:cpg
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
54 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
65 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
124 clocks = <&cpg CPG_MOD 402>;
126 resets = <&cpg 402>;
140 clocks = <&cpg CPG_MOD 912>;
142 resets = <&cpg 912>;
155 clocks = <&cpg CPG_MOD 911>;
157 resets = <&cpg 911>;
170 clocks = <&cpg CPG_MOD 910>;
172 resets = <&cpg 910>;
185 clocks = <&cpg CPG_MOD 909>;
187 resets = <&cpg 909>;
200 clocks = <&cpg CPG_MOD 908>;
202 resets = <&cpg 908>;
215 clocks = <&cpg CPG_MOD 907>;
217 resets = <&cpg 907>;
230 clocks = <&cpg CPG_MOD 905>;
232 resets = <&cpg 905>;
245 clocks = <&cpg CPG_MOD 904>;
247 resets = <&cpg 904>;
260 clocks = <&cpg CPG_MOD 921>;
262 resets = <&cpg 921>;
275 clocks = <&cpg CPG_MOD 919>;
277 resets = <&cpg 919>;
290 clocks = <&cpg CPG_MOD 914>;
292 resets = <&cpg 914>;
305 clocks = <&cpg CPG_MOD 913>;
307 resets = <&cpg 913>;
316 cpg: clock-controller@e6150000 { label
317 compatible = "renesas,r8a7792-cpg-mssr";
354 clocks = <&cpg CPG_MOD 407>;
356 resets = <&cpg 407>;
366 clocks = <&cpg CPG_MOD 125>;
369 resets = <&cpg 125>;
381 clocks = <&cpg CPG_MOD 111>;
384 resets = <&cpg 111>;
396 clocks = <&cpg CPG_MOD 122>;
399 resets = <&cpg 122>;
411 clocks = <&cpg CPG_MOD 121>;
414 resets = <&cpg 121>;
445 clocks = <&cpg CPG_MOD 931>;
447 resets = <&cpg 931>;
459 clocks = <&cpg CPG_MOD 930>;
461 resets = <&cpg 930>;
473 clocks = <&cpg CPG_MOD 929>;
475 resets = <&cpg 929>;
487 clocks = <&cpg CPG_MOD 928>;
489 resets = <&cpg 928>;
501 clocks = <&cpg CPG_MOD 927>;
503 resets = <&cpg 927>;
515 clocks = <&cpg CPG_MOD 925>;
517 resets = <&cpg 925>;
532 clocks = <&cpg CPG_MOD 926>;
537 resets = <&cpg 926>;
566 clocks = <&cpg CPG_MOD 219>;
569 resets = <&cpg 219>;
599 clocks = <&cpg CPG_MOD 218>;
602 resets = <&cpg 218>;
612 clocks = <&cpg CPG_MOD 812>;
615 resets = <&cpg 812>;
625 clocks = <&cpg CPG_MOD 917>;
630 resets = <&cpg 917>;
642 clocks = <&cpg CPG_MOD 721>,
643 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
649 resets = <&cpg 721>;
658 clocks = <&cpg CPG_MOD 720>,
659 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
665 resets = <&cpg 720>;
674 clocks = <&cpg CPG_MOD 719>,
675 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
681 resets = <&cpg 719>;
690 clocks = <&cpg CPG_MOD 718>,
691 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
697 resets = <&cpg 718>;
706 clocks = <&cpg CPG_MOD 717>,
707 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
713 resets = <&cpg 717>;
722 clocks = <&cpg CPG_MOD 716>,
723 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
729 resets = <&cpg 716>;
738 clocks = <&cpg CPG_MOD 000>;
743 resets = <&cpg 000>;
754 clocks = <&cpg CPG_MOD 208>;
759 resets = <&cpg 208>;
770 clocks = <&cpg CPG_MOD 916>,
771 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
774 resets = <&cpg 916>;
783 clocks = <&cpg CPG_MOD 915>,
784 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
787 resets = <&cpg 915>;
796 clocks = <&cpg CPG_MOD 811>;
798 resets = <&cpg 811>;
807 clocks = <&cpg CPG_MOD 810>;
809 resets = <&cpg 810>;
818 clocks = <&cpg CPG_MOD 809>;
820 resets = <&cpg 809>;
829 clocks = <&cpg CPG_MOD 808>;
831 resets = <&cpg 808>;
840 clocks = <&cpg CPG_MOD 805>;
842 resets = <&cpg 805>;
851 clocks = <&cpg CPG_MOD 804>;
853 resets = <&cpg 804>;
865 clocks = <&cpg CPG_MOD 314>;
867 resets = <&cpg 314>;
881 clocks = <&cpg CPG_MOD 408>;
884 resets = <&cpg 408>;
891 clocks = <&cpg CPG_MOD 131>;
893 resets = <&cpg 131>;
900 clocks = <&cpg CPG_MOD 128>;
902 resets = <&cpg 128>;
909 clocks = <&cpg CPG_MOD 127>;
911 resets = <&cpg 127>;
919 clocks = <&cpg CPG_MOD 106>;
921 resets = <&cpg 106>;
929 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
931 resets = <&cpg 724>;
964 clocks = <&cpg CPG_MOD 124>;
967 resets = <&cpg 124>;
984 clocks = <&cpg CPG_MOD 329>;
987 resets = <&cpg 329>;