Lines Matching full:cpg
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
78 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
122 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
144 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
166 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
178 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
190 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
202 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
280 clocks = <&cpg CPG_MOD 402>;
282 resets = <&cpg 402>;
296 clocks = <&cpg CPG_MOD 912>;
298 resets = <&cpg 912>;
311 clocks = <&cpg CPG_MOD 911>;
313 resets = <&cpg 911>;
326 clocks = <&cpg CPG_MOD 910>;
328 resets = <&cpg 910>;
341 clocks = <&cpg CPG_MOD 909>;
343 resets = <&cpg 909>;
356 clocks = <&cpg CPG_MOD 908>;
358 resets = <&cpg 908>;
371 clocks = <&cpg CPG_MOD 907>;
373 resets = <&cpg 907>;
386 clocks = <&cpg CPG_MOD 304>;
388 resets = <&cpg 304>;
393 cpg: clock-controller@e6150000 { label
394 compatible = "renesas,r8a7790-cpg-mssr";
437 clocks = <&cpg CPG_MOD 407>;
439 resets = <&cpg 407>;
449 clocks = <&cpg CPG_MOD 125>;
452 resets = <&cpg 125>;
464 clocks = <&cpg CPG_MOD 111>;
467 resets = <&cpg 111>;
479 clocks = <&cpg CPG_MOD 122>;
482 resets = <&cpg 122>;
493 clocks = <&cpg CPG_MOD 121>;
496 resets = <&cpg 121>;
506 clocks = <&cpg CPG_MOD 522>;
508 resets = <&cpg 522>;
597 clocks = <&cpg CPG_MOD 931>;
599 resets = <&cpg 931>;
611 clocks = <&cpg CPG_MOD 930>;
613 resets = <&cpg 930>;
625 clocks = <&cpg CPG_MOD 929>;
627 resets = <&cpg 929>;
639 clocks = <&cpg CPG_MOD 928>;
641 resets = <&cpg 928>;
654 clocks = <&cpg CPG_MOD 318>;
659 resets = <&cpg 318>;
671 clocks = <&cpg CPG_MOD 323>;
676 resets = <&cpg 323>;
688 clocks = <&cpg CPG_MOD 300>;
693 resets = <&cpg 300>;
705 clocks = <&cpg CPG_MOD 926>;
710 resets = <&cpg 926>;
719 clocks = <&cpg CPG_MOD 704>;
724 resets = <&cpg 704>;
737 clocks = <&cpg CPG_MOD 704>;
740 resets = <&cpg 704>;
760 clocks = <&cpg CPG_MOD 330>;
762 resets = <&cpg 330>;
774 clocks = <&cpg CPG_MOD 331>;
776 resets = <&cpg 331>;
806 clocks = <&cpg CPG_MOD 219>;
809 resets = <&cpg 219>;
839 clocks = <&cpg CPG_MOD 218>;
842 resets = <&cpg 218>;
852 clocks = <&cpg CPG_MOD 812>;
855 resets = <&cpg 812>;
865 clocks = <&cpg CPG_MOD 917>;
870 resets = <&cpg 917>;
882 clocks = <&cpg CPG_MOD 204>;
888 resets = <&cpg 204>;
897 clocks = <&cpg CPG_MOD 203>;
903 resets = <&cpg 203>;
912 clocks = <&cpg CPG_MOD 202>;
918 resets = <&cpg 202>;
927 clocks = <&cpg CPG_MOD 206>;
933 resets = <&cpg 206>;
942 clocks = <&cpg CPG_MOD 207>;
948 resets = <&cpg 207>;
957 clocks = <&cpg CPG_MOD 216>;
963 resets = <&cpg 216>;
973 clocks = <&cpg CPG_MOD 721>,
974 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
980 resets = <&cpg 721>;
990 clocks = <&cpg CPG_MOD 720>,
991 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
997 resets = <&cpg 720>;
1007 clocks = <&cpg CPG_MOD 310>,
1008 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
1014 resets = <&cpg 310>;
1023 clocks = <&cpg CPG_MOD 717>,
1024 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
1030 resets = <&cpg 717>;
1039 clocks = <&cpg CPG_MOD 716>,
1040 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
1046 resets = <&cpg 716>;
1055 clocks = <&cpg CPG_MOD 0>;
1060 resets = <&cpg 0>;
1071 clocks = <&cpg CPG_MOD 208>;
1076 resets = <&cpg 208>;
1087 clocks = <&cpg CPG_MOD 205>;
1092 resets = <&cpg 205>;
1103 clocks = <&cpg CPG_MOD 215>;
1108 resets = <&cpg 215>;
1117 clocks = <&cpg CPG_MOD 523>;
1119 resets = <&cpg 523>;
1127 clocks = <&cpg CPG_MOD 523>;
1129 resets = <&cpg 523>;
1137 clocks = <&cpg CPG_MOD 523>;
1139 resets = <&cpg 523>;
1147 clocks = <&cpg CPG_MOD 523>;
1149 resets = <&cpg 523>;
1157 clocks = <&cpg CPG_MOD 523>;
1159 resets = <&cpg 523>;
1167 clocks = <&cpg CPG_MOD 523>;
1169 resets = <&cpg 523>;
1177 clocks = <&cpg CPG_MOD 523>;
1179 resets = <&cpg 523>;
1189 clocks = <&cpg CPG_MOD 916>,
1190 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1193 resets = <&cpg 916>;
1202 clocks = <&cpg CPG_MOD 915>,
1203 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1206 resets = <&cpg 915>;
1215 clocks = <&cpg CPG_MOD 811>;
1217 resets = <&cpg 811>;
1226 clocks = <&cpg CPG_MOD 810>;
1228 resets = <&cpg 810>;
1237 clocks = <&cpg CPG_MOD 809>;
1239 resets = <&cpg 809>;
1248 clocks = <&cpg CPG_MOD 808>;
1250 resets = <&cpg 808>;
1270 clocks = <&cpg CPG_MOD 1005>,
1271 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1272 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1273 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1274 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1275 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1276 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1277 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1278 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1279 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1280 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1281 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1282 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1283 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1285 <&cpg CPG_CORE R8A7790_CLK_M2>;
1298 resets = <&cpg 1005>,
1299 <&cpg 1006>, <&cpg 1007>,
1300 <&cpg 1008>, <&cpg 1009>,
1301 <&cpg 1010>, <&cpg 1011>,
1302 <&cpg 1012>, <&cpg 1013>,
1303 <&cpg 1014>, <&cpg 1015>;
1478 clocks = <&cpg CPG_MOD 502>;
1481 resets = <&cpg 502>;
1509 clocks = <&cpg CPG_MOD 501>;
1512 resets = <&cpg 501>;
1522 clocks = <&cpg CPG_MOD 328>;
1524 resets = <&cpg 328>;
1537 clocks = <&cpg CPG_MOD 703>;
1539 resets = <&cpg 703>;
1572 clocks = <&cpg CPG_MOD 703>;
1574 resets = <&cpg 703>;
1592 clocks = <&cpg CPG_MOD 703>;
1594 resets = <&cpg 703>;
1628 clocks = <&cpg CPG_MOD 314>;
1634 resets = <&cpg 314>;
1643 clocks = <&cpg CPG_MOD 313>;
1649 resets = <&cpg 313>;
1658 clocks = <&cpg CPG_MOD 312>;
1664 resets = <&cpg 312>;
1673 clocks = <&cpg CPG_MOD 311>;
1679 resets = <&cpg 311>;
1688 clocks = <&cpg CPG_MOD 315>;
1693 resets = <&cpg 315>;
1703 clocks = <&cpg CPG_MOD 305>;
1708 resets = <&cpg 305>;
1718 clocks = <&cpg CPG_MOD 815>;
1720 resets = <&cpg 815>;
1729 clocks = <&cpg CPG_MOD 814>;
1731 resets = <&cpg 814>;
1740 clocks = <&cpg CPG_MOD 813>;
1742 resets = <&cpg 813>;
1757 clocks = <&cpg CPG_MOD 408>;
1760 resets = <&cpg 408>;
1784 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1787 resets = <&cpg 319>;
1795 clocks = <&cpg CPG_MOD 130>;
1797 resets = <&cpg 130>;
1804 clocks = <&cpg CPG_MOD 131>;
1806 resets = <&cpg 131>;
1813 clocks = <&cpg CPG_MOD 128>;
1815 resets = <&cpg 128>;
1822 clocks = <&cpg CPG_MOD 127>;
1824 resets = <&cpg 127>;
1831 clocks = <&cpg CPG_MOD 119>;
1833 resets = <&cpg 119>;
1840 clocks = <&cpg CPG_MOD 118>;
1842 resets = <&cpg 118>;
1849 clocks = <&cpg CPG_MOD 117>;
1851 resets = <&cpg 117>;
1859 clocks = <&cpg CPG_MOD 106>;
1861 resets = <&cpg 106>;
1870 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1871 <&cpg CPG_MOD 722>;
1873 resets = <&cpg 724>;
1904 clocks = <&cpg CPG_MOD 726>;
1906 resets = <&cpg 726>;
1930 clocks = <&cpg CPG_MOD 725>;
1932 resets = <&cpg 725>;
1965 clocks = <&cpg CPG_MOD 124>;
1968 resets = <&cpg 124>;
1985 clocks = <&cpg CPG_MOD 329>;
1988 resets = <&cpg 329>;