Lines Matching +full:sh +full:- +full:mmcif
1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/r8a73a4-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a15";
28 clock-frequency = <1500000000>;
29 power-domains = <&pd_a2sl>;
30 next-level-cache = <&L2_CA15>;
33 L2_CA15: cache-controller-0 {
36 power-domains = <&pd_a3sm>;
37 cache-unified;
38 cache-level = <2>;
41 L2_CA7: cache-controller-1 {
44 power-domains = <&pd_a3km>;
45 cache-unified;
46 cache-level = <2>;
51 compatible = "arm,coresight-etm3x";
52 power-domains = <&pd_d4>;
56 compatible = "arm,armv7-timer";
61 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
65 compatible = "renesas,tmu-r8a73a4", "renesas,tmu";
70 interrupt-names = "tuni0", "tuni1", "tuni2";
72 clock-names = "fck";
73 power-domains = <&pd_c5>;
78 compatible = "renesas,tmu-r8a73a4", "renesas,tmu";
83 interrupt-names = "tuni0", "tuni1", "tuni2";
85 clock-names = "fck";
86 power-domains = <&pd_a3r>;
90 dbsc1: memory-controller@e6790000 {
91 compatible = "renesas,dbsc-r8a73a4";
93 power-domains = <&pd_a3bc>;
96 dbsc2: memory-controller@e67a0000 {
97 compatible = "renesas,dbsc-r8a73a4";
99 power-domains = <&pd_a3bc>;
103 #address-cells = <1>;
104 #size-cells = <0>;
105 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
109 power-domains = <&pd_a3sp>;
115 compatible = "renesas,r8a73a4-cmt1", "renesas,rcar-gen2-cmt1";
126 clock-names = "fck";
127 power-domains = <&pd_c5>;
131 irqc0: interrupt-controller@e61c0000 {
132 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
133 #interrupt-cells = <2>;
134 interrupt-controller;
169 power-domains = <&pd_c4>;
172 irqc1: interrupt-controller@e61c0200 {
173 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
174 #interrupt-cells = <2>;
175 interrupt-controller;
204 power-domains = <&pd_c4>;
208 compatible = "renesas,pfc-r8a73a4";
210 gpio-controller;
211 #gpio-cells = <2>;
212 gpio-ranges =
219 interrupts-extended =
235 power-domains = <&pd_c5>;
239 compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal";
244 power-domains = <&pd_c5>;
248 #address-cells = <1>;
249 #size-cells = <0>;
250 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
254 power-domains = <&pd_a3sp>;
259 #address-cells = <1>;
260 #size-cells = <0>;
261 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
265 power-domains = <&pd_a3sp>;
270 #address-cells = <1>;
271 #size-cells = <0>;
272 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
276 power-domains = <&pd_a3sp>;
281 #address-cells = <1>;
282 #size-cells = <0>;
283 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
287 power-domains = <&pd_a3sp>;
292 #address-cells = <1>;
293 #size-cells = <0>;
294 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
298 power-domains = <&pd_a3sp>;
303 #address-cells = <1>;
304 #size-cells = <0>;
305 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
309 power-domains = <&pd_a3sp>;
314 #address-cells = <1>;
315 #size-cells = <0>;
316 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
320 power-domains = <&pd_a3sp>;
325 #address-cells = <1>;
326 #size-cells = <0>;
327 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
331 power-domains = <&pd_a3sp>;
336 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
340 clock-names = "fck";
341 power-domains = <&pd_a3sp>;
346 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
350 clock-names = "fck";
351 power-domains = <&pd_a3sp>;
356 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
360 clock-names = "fck";
361 power-domains = <&pd_a3sp>;
366 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
370 clock-names = "fck";
371 power-domains = <&pd_a3sp>;
376 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
380 clock-names = "fck";
381 power-domains = <&pd_a3sp>;
386 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
390 clock-names = "fck";
391 power-domains = <&pd_c4>;
396 compatible = "renesas,sdhi-r8a73a4";
400 power-domains = <&pd_a3sp>;
401 cap-sd-highspeed;
406 compatible = "renesas,sdhi-r8a73a4";
410 power-domains = <&pd_a3sp>;
411 cap-sd-highspeed;
416 compatible = "renesas,sdhi-r8a73a4";
420 power-domains = <&pd_a3sp>;
421 cap-sd-highspeed;
426 compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
430 power-domains = <&pd_a3sp>;
431 reg-io-width = <4>;
436 compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
440 power-domains = <&pd_a3sp>;
441 reg-io-width = <4>;
445 gic: interrupt-controller@f1001000 {
446 compatible = "arm,gic-400";
447 #interrupt-cells = <3>;
448 #address-cells = <0>;
449 interrupt-controller;
456 clock-names = "clk";
457 power-domains = <&pd_c4>;
461 compatible = "renesas,bsc-r8a73a4", "renesas,bsc",
462 "simple-pm-bus";
463 #address-cells = <1>;
464 #size-cells = <1>;
468 power-domains = <&pd_c4>;
472 #address-cells = <2>;
473 #size-cells = <2>;
478 compatible = "fixed-clock";
479 #clock-cells = <0>;
481 clock-frequency = <0>;
484 compatible = "fixed-clock";
485 #clock-cells = <0>;
487 clock-frequency = <0>;
490 compatible = "fixed-clock";
491 #clock-cells = <0>;
493 clock-frequency = <0>;
496 compatible = "fixed-clock";
497 #clock-cells = <0>;
499 clock-frequency = <0>;
502 compatible = "fixed-clock";
503 #clock-cells = <0>;
505 clock-frequency = <0>;
510 compatible = "renesas,r8a73a4-cpg-clocks";
513 #clock-cells = <1>;
514 clock-output-names = "main", "pll0", "pll1", "pll2",
522 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
526 #clock-cells = <0>;
527 clock-output-names = "zb";
530 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
534 #clock-cells = <0>;
537 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
541 #clock-cells = <0>;
544 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
548 #clock-cells = <0>;
551 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
555 #clock-cells = <0>;
558 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
562 #clock-cells = <0>;
565 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
570 #clock-cells = <0>;
573 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
578 #clock-cells = <0>;
581 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
586 #clock-cells = <0>;
589 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
594 #clock-cells = <0>;
597 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
602 #clock-cells = <0>;
605 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
609 #clock-cells = <0>;
612 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
616 #clock-cells = <0>;
619 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
623 #clock-cells = <0>;
626 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
629 #clock-cells = <0>;
632 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
636 #clock-cells = <0>;
639 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
643 #clock-cells = <0>;
648 compatible = "fixed-factor-clock";
650 #clock-cells = <0>;
651 clock-div = <2>;
652 clock-mult = <1>;
655 compatible = "fixed-factor-clock";
657 #clock-cells = <0>;
658 clock-div = <1>;
659 clock-mult = <1>;
662 compatible = "fixed-factor-clock";
664 #clock-cells = <0>;
665 clock-div = <2>;
666 clock-mult = <1>;
669 compatible = "fixed-factor-clock";
671 #clock-cells = <0>;
672 clock-div = <2>;
673 clock-mult = <1>;
676 compatible = "fixed-factor-clock";
678 #clock-cells = <0>;
679 clock-div = <2>;
680 clock-mult = <1>;
685 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
688 #clock-cells = <1>;
689 clock-indices = <
692 clock-output-names =
696 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
700 #clock-cells = <1>;
701 clock-indices = <
707 clock-output-names =
712 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
720 #clock-cells = <1>;
721 clock-indices = <
729 clock-output-names =
735 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
740 #clock-cells = <1>;
741 clock-indices = <
746 clock-output-names =
747 "irqc", "intc-sys", "iic5", "iic4", "iic3";
750 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
753 #clock-cells = <1>;
754 clock-indices = <
757 clock-output-names =
767 sysc: system-controller@e6180000 {
768 compatible = "renesas,sysc-r8a73a4", "renesas,sysc-rmobile";
771 pm-domains {
773 #address-cells = <1>;
774 #size-cells = <0>;
775 #power-domain-cells = <0>;
779 #address-cells = <1>;
780 #size-cells = <0>;
781 #power-domain-cells = <0>;
785 #power-domain-cells = <0>;
790 #power-domain-cells = <0>;
795 #address-cells = <1>;
796 #size-cells = <0>;
797 #power-domain-cells = <0>;
801 #power-domain-cells = <0>;
807 #address-cells = <1>;
808 #size-cells = <0>;
809 #power-domain-cells = <0>;
813 #power-domain-cells = <0>;
819 #address-cells = <1>;
820 #size-cells = <0>;
821 #power-domain-cells = <0>;
825 #power-domain-cells = <0>;
832 #power-domain-cells = <0>;
837 #power-domain-cells = <0>;
842 #power-domain-cells = <0>;
847 #address-cells = <1>;
848 #size-cells = <0>;
849 #power-domain-cells = <0>;
853 #power-domain-cells = <0>;
859 #power-domain-cells = <0>;
864 #power-domain-cells = <0>;
869 #address-cells = <1>;
870 #size-cells = <0>;
871 #power-domain-cells = <0>;
875 #power-domain-cells = <0>;
880 #power-domain-cells = <0>;
886 #power-domain-cells = <0>;
891 #address-cells = <1>;
892 #size-cells = <0>;
893 #power-domain-cells = <0>;
897 #power-domain-cells = <0>;
902 #power-domain-cells = <0>;