Lines Matching +full:sh +full:- +full:mmcif
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-14 Renesas Solutions Corp.
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
9 #include <dt-bindings/clock/r7s72100-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
32 #clock-cells = <0>;
33 compatible = "fixed-factor-clock";
35 clock-mult = <1>;
36 clock-div = <3>;
40 compatible = "simple-bus";
41 #address-cells = <1>;
42 #size-cells = <1>;
47 #address-cells = <1>;
48 #size-cells = <0>;
52 compatible = "arm,cortex-a9";
54 clock-frequency = <400000000>;
56 next-level-cache = <&L2>;
62 #clock-cells = <0>;
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
69 #clock-cells = <0>;
70 compatible = "fixed-factor-clock";
72 clock-mult = <1>;
73 clock-div = <12>;
77 #clock-cells = <0>;
78 compatible = "fixed-factor-clock";
80 clock-mult = <1>;
81 clock-div = <6>;
85 compatible = "arm,cortex-a9-pmu";
86 interrupts-extended = <&gic GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
90 #clock-cells = <0>;
91 compatible = "fixed-clock";
93 clock-frequency = <0>;
97 #clock-cells = <0>;
98 compatible = "fixed-clock";
100 clock-frequency = <0>;
104 compatible = "simple-bus";
105 interrupt-parent = <&gic>;
107 #address-cells = <1>;
108 #size-cells = <1>;
111 L2: cache-controller@3ffff000 {
112 compatible = "arm,pl310-cache";
115 arm,early-bresp-disable;
116 arm,full-line-zero-disable;
117 cache-unified;
118 cache-level = <2>;
122 compatible = "renesas,scif-r7s72100", "renesas,scif";
128 interrupt-names = "eri", "rxi", "txi", "bri";
130 clock-names = "fck";
131 power-domains = <&cpg_clocks>;
136 compatible = "renesas,scif-r7s72100", "renesas,scif";
142 interrupt-names = "eri", "rxi", "txi", "bri";
144 clock-names = "fck";
145 power-domains = <&cpg_clocks>;
150 compatible = "renesas,scif-r7s72100", "renesas,scif";
156 interrupt-names = "eri", "rxi", "txi", "bri";
158 clock-names = "fck";
159 power-domains = <&cpg_clocks>;
164 compatible = "renesas,scif-r7s72100", "renesas,scif";
170 interrupt-names = "eri", "rxi", "txi", "bri";
172 clock-names = "fck";
173 power-domains = <&cpg_clocks>;
178 compatible = "renesas,scif-r7s72100", "renesas,scif";
184 interrupt-names = "eri", "rxi", "txi", "bri";
186 clock-names = "fck";
187 power-domains = <&cpg_clocks>;
192 compatible = "renesas,scif-r7s72100", "renesas,scif";
198 interrupt-names = "eri", "rxi", "txi", "bri";
200 clock-names = "fck";
201 power-domains = <&cpg_clocks>;
206 compatible = "renesas,scif-r7s72100", "renesas,scif";
212 interrupt-names = "eri", "rxi", "txi", "bri";
214 clock-names = "fck";
215 power-domains = <&cpg_clocks>;
220 compatible = "renesas,scif-r7s72100", "renesas,scif";
226 interrupt-names = "eri", "rxi", "txi", "bri";
228 clock-names = "fck";
229 power-domains = <&cpg_clocks>;
234 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
239 interrupt-names = "error", "rx", "tx";
241 power-domains = <&cpg_clocks>;
242 num-cs = <1>;
243 #address-cells = <1>;
244 #size-cells = <0>;
249 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
254 interrupt-names = "error", "rx", "tx";
256 power-domains = <&cpg_clocks>;
257 num-cs = <1>;
258 #address-cells = <1>;
259 #size-cells = <0>;
264 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
269 interrupt-names = "error", "rx", "tx";
271 power-domains = <&cpg_clocks>;
272 num-cs = <1>;
273 #address-cells = <1>;
274 #size-cells = <0>;
279 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
284 interrupt-names = "error", "rx", "tx";
286 power-domains = <&cpg_clocks>;
287 num-cs = <1>;
288 #address-cells = <1>;
289 #size-cells = <0>;
294 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
299 interrupt-names = "error", "rx", "tx";
301 power-domains = <&cpg_clocks>;
302 num-cs = <1>;
303 #address-cells = <1>;
304 #size-cells = <0>;
309 compatible = "renesas,usbhs-r7s72100", "renesas,rza1-usbhs";
314 power-domains = <&cpg_clocks>;
319 compatible = "renesas,usbhs-r7s72100", "renesas,rza1-usbhs";
324 power-domains = <&cpg_clocks>;
328 mmcif: mmc@e804c800 { label
329 compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";
335 power-domains = <&cpg_clocks>;
336 reg-io-width = <4>;
337 bus-width = <8>;
342 compatible = "renesas,sdhi-r7s72100";
350 clock-names = "core", "cd";
351 power-domains = <&cpg_clocks>;
352 cap-sd-highspeed;
353 cap-sdio-irq;
358 compatible = "renesas,sdhi-r7s72100";
366 clock-names = "core", "cd";
367 power-domains = <&cpg_clocks>;
368 cap-sd-highspeed;
369 cap-sdio-irq;
373 gic: interrupt-controller@e8201000 {
375 #interrupt-cells = <3>;
376 #address-cells = <0>;
377 interrupt-controller;
383 compatible = "renesas,ether-r7s72100";
388 power-domains = <&cpg_clocks>;
389 phy-mode = "mii";
390 #address-cells = <1>;
391 #size-cells = <0>;
397 compatible = "renesas,r7s72100-ceu";
400 power-domains = <&cpg_clocks>;
405 compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
413 #clock-cells = <1>;
414 compatible = "renesas,r7s72100-cpg-clocks",
415 "renesas,rz-cpg-clocks";
418 clock-output-names = "pll", "i", "g";
419 #power-domain-cells = <0>;
424 #clock-cells = <1>;
425 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
428 clock-indices = <R7S72100_CLK_MTU2>;
429 clock-output-names = "mtu2";
433 #clock-cells = <1>;
434 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
438 clock-indices = <
442 clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
446 #clock-cells = <1>;
447 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
450 clock-indices = <R7S72100_CLK_OSTM0 R7S72100_CLK_OSTM1>;
451 clock-output-names = "ostm0", "ostm1";
455 #clock-cells = <1>;
456 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
459 clock-indices = <R7S72100_CLK_CEU R7S72100_CLK_RTC>;
460 clock-output-names = "ceu", "rtc";
464 #clock-cells = <1>;
465 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
468 clock-indices = <R7S72100_CLK_ETHER R7S72100_CLK_USB0 R7S72100_CLK_USB1>;
469 clock-output-names = "ether", "usb0", "usb1";
473 #clock-cells = <1>;
474 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
477 clock-indices = <R7S72100_CLK_MMCIF>;
478 clock-output-names = "mmcif";
482 #clock-cells = <1>;
483 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
486 clock-indices = <
490 clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3", "spibsc0", "spibsc1";
494 #clock-cells = <1>;
495 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
499 clock-indices = <
503 clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
506 #clock-cells = <1>;
507 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
510 clock-indices = <
514 clock-output-names = "sdhi00", "sdhi01", "sdhi10", "sdhi11";
518 compatible = "renesas,r7s72100-ports";
522 port0: gpio-0 {
523 gpio-controller;
524 #gpio-cells = <2>;
525 gpio-ranges = <&pinctrl 0 0 6>;
528 port1: gpio-1 {
529 gpio-controller;
530 #gpio-cells = <2>;
531 gpio-ranges = <&pinctrl 0 16 16>;
534 port2: gpio-2 {
535 gpio-controller;
536 #gpio-cells = <2>;
537 gpio-ranges = <&pinctrl 0 32 16>;
540 port3: gpio-3 {
541 gpio-controller;
542 #gpio-cells = <2>;
543 gpio-ranges = <&pinctrl 0 48 16>;
546 port4: gpio-4 {
547 gpio-controller;
548 #gpio-cells = <2>;
549 gpio-ranges = <&pinctrl 0 64 16>;
552 port5: gpio-5 {
553 gpio-controller;
554 #gpio-cells = <2>;
555 gpio-ranges = <&pinctrl 0 80 11>;
558 port6: gpio-6 {
559 gpio-controller;
560 #gpio-cells = <2>;
561 gpio-ranges = <&pinctrl 0 96 16>;
564 port7: gpio-7 {
565 gpio-controller;
566 #gpio-cells = <2>;
567 gpio-ranges = <&pinctrl 0 112 16>;
570 port8: gpio-8 {
571 gpio-controller;
572 #gpio-cells = <2>;
573 gpio-ranges = <&pinctrl 0 128 16>;
576 port9: gpio-9 {
577 gpio-controller;
578 #gpio-cells = <2>;
579 gpio-ranges = <&pinctrl 0 144 8>;
582 port10: gpio-10 {
583 gpio-controller;
584 #gpio-cells = <2>;
585 gpio-ranges = <&pinctrl 0 160 16>;
588 port11: gpio-11 {
589 gpio-controller;
590 #gpio-cells = <2>;
591 gpio-ranges = <&pinctrl 0 176 16>;
596 compatible = "renesas,r7s72100-ostm", "renesas,ostm";
600 power-domains = <&cpg_clocks>;
605 compatible = "renesas,r7s72100-ostm", "renesas,ostm";
609 power-domains = <&cpg_clocks>;
614 #address-cells = <1>;
615 #size-cells = <0>;
616 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
626 interrupt-names = "tei", "ri", "ti", "spi", "sti",
629 clock-frequency = <100000>;
630 power-domains = <&cpg_clocks>;
635 #address-cells = <1>;
636 #size-cells = <0>;
637 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
647 interrupt-names = "tei", "ri", "ti", "spi", "sti",
650 clock-frequency = <100000>;
651 power-domains = <&cpg_clocks>;
656 #address-cells = <1>;
657 #size-cells = <0>;
658 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
668 interrupt-names = "tei", "ri", "ti", "spi", "sti",
671 clock-frequency = <100000>;
672 power-domains = <&cpg_clocks>;
677 #address-cells = <1>;
678 #size-cells = <0>;
679 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
689 interrupt-names = "tei", "ri", "ti", "spi", "sti",
692 clock-frequency = <100000>;
693 power-domains = <&cpg_clocks>;
697 irqc: interrupt-controller@fcfef800 {
698 compatible = "renesas,r7s72100-irqc",
699 "renesas,rza1-irqc";
700 #interrupt-cells = <2>;
701 #address-cells = <0>;
702 interrupt-controller;
704 interrupt-map =
713 interrupt-map-mask = <7 0>;
717 compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
720 interrupt-names = "tgi0a";
722 clock-names = "fck";
723 power-domains = <&cpg_clocks>;
728 compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
733 interrupt-names = "alarm", "period", "carry";
736 clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
737 power-domains = <&cpg_clocks>;
743 #clock-cells = <0>;
744 compatible = "fixed-clock";
746 clock-frequency = <0>;