Lines Matching +full:dsp +full:- +full:gpio20
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
15 interrupt-parent = <&intc>;
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <19200000>;
27 compatible = "fixed-clock";
28 #clock-cells = <0>;
29 clock-frequency = <32768>;
34 #address-cells = <1>;
35 #size-cells = <0>;
40 enable-method = "qcom,kpss-acc-v2";
43 next-level-cache = <&l2>;
46 cpu-idle-states = <&cpu_spc>;
51 enable-method = "qcom,kpss-acc-v2";
54 next-level-cache = <&l2>;
57 cpu-idle-states = <&cpu_spc>;
62 enable-method = "qcom,kpss-acc-v2";
65 next-level-cache = <&l2>;
68 cpu-idle-states = <&cpu_spc>;
73 enable-method = "qcom,kpss-acc-v2";
76 next-level-cache = <&l2>;
79 cpu-idle-states = <&cpu_spc>;
82 l2: l2-cache {
84 cache-level = <2>;
85 cache-unified;
89 idle-states {
90 cpu_spc: cpu-spc {
91 compatible = "qcom,idle-state-spc",
92 "arm,idle-state";
93 entry-latency-us = <150>;
94 exit-latency-us = <200>;
95 min-residency-us = <2000>;
102 compatible = "qcom,scm-msm8974", "qcom,scm";
104 clock-names = "core", "bus", "iface";
114 compatible = "qcom,krait-pmu";
119 compatible = "qcom,msm8974-rpm-proc", "qcom,rpm-proc";
121 master-stats {
122 compatible = "qcom,rpm-master-stats";
123 qcom,rpm-msg-ram = <&apss_master_stats>,
127 qcom,master-names = "APSS",
133 smd-edge {
136 qcom,smd-edge = <15>;
138 rpm_requests: rpm-requests {
139 compatible = "qcom,rpm-msm8974", "qcom,smd-rpm";
140 qcom,smd-channels = "rpm_requests";
142 rpmcc: clock-controller {
143 compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc";
144 #clock-cells = <1>;
146 clock-names = "xo";
152 reserved_memory: reserved-memory {
153 #address-cells = <1>;
154 #size-cells = <1>;
159 no-map;
164 no-map;
169 no-map;
174 no-map;
179 no-map;
184 no-map;
189 no-map;
194 no-map;
198 compatible = "qcom,rmtfs-mem";
200 no-map;
202 qcom,client-id = <1>;
209 memory-region = <&smem_region>;
210 qcom,rpm-msg-ram = <&rpm_msg_ram>;
215 smp2p-adsp {
219 interrupt-parent = <&intc>;
224 qcom,local-pid = <0>;
225 qcom,remote-pid = <2>;
227 adsp_smp2p_out: master-kernel {
228 qcom,entry-name = "master-kernel";
229 #qcom,smem-state-cells = <1>;
232 adsp_smp2p_in: slave-kernel {
233 qcom,entry-name = "slave-kernel";
235 interrupt-controller;
236 #interrupt-cells = <2>;
240 smp2p-modem {
244 interrupt-parent = <&intc>;
249 qcom,local-pid = <0>;
250 qcom,remote-pid = <1>;
252 modem_smp2p_out: master-kernel {
253 qcom,entry-name = "master-kernel";
254 #qcom,smem-state-cells = <1>;
257 modem_smp2p_in: slave-kernel {
258 qcom,entry-name = "slave-kernel";
260 interrupt-controller;
261 #interrupt-cells = <2>;
265 smp2p-wcnss {
269 interrupt-parent = <&intc>;
274 qcom,local-pid = <0>;
275 qcom,remote-pid = <4>;
277 wcnss_smp2p_out: master-kernel {
278 qcom,entry-name = "master-kernel";
280 #qcom,smem-state-cells = <1>;
283 wcnss_smp2p_in: slave-kernel {
284 qcom,entry-name = "slave-kernel";
286 interrupt-controller;
287 #interrupt-cells = <2>;
294 #address-cells = <1>;
295 #size-cells = <0>;
302 #qcom,smem-state-cells = <1>;
309 interrupt-controller;
310 #interrupt-cells = <2>;
317 interrupt-controller;
318 #interrupt-cells = <2>;
325 interrupt-controller;
326 #interrupt-cells = <2>;
331 #address-cells = <1>;
332 #size-cells = <1>;
334 compatible = "simple-bus";
336 intc: interrupt-controller@f9000000 {
337 compatible = "qcom,msm-qgic2";
338 interrupt-controller;
339 #interrupt-cells = <3>;
345 compatible = "qcom,msm8974-apcs-kpss-global",
346 "qcom,msm8994-apcs-kpss-global", "syscon";
348 #mbox-cells = <1>;
351 saw_l2: power-manager@f9012000 {
352 compatible = "qcom,msm8974-saw2-v2.1-l2", "qcom,saw2";
357 compatible = "qcom,apss-wdt-msm8974", "qcom,kpss-wdt";
365 #address-cells = <1>;
366 #size-cells = <1>;
368 compatible = "arm,armv7-timer-mem";
370 clock-frequency = <19200000>;
373 frame-number = <0>;
381 frame-number = <1>;
388 frame-number = <2>;
395 frame-number = <3>;
402 frame-number = <4>;
409 frame-number = <5>;
416 frame-number = <6>;
423 acc0: power-manager@f9088000 {
424 compatible = "qcom,kpss-acc-v2";
428 saw0: power-manager@f9089000 {
429 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
433 acc1: power-manager@f9098000 {
434 compatible = "qcom,kpss-acc-v2";
438 saw1: power-manager@f9099000 {
439 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
443 acc2: power-manager@f90a8000 {
444 compatible = "qcom,kpss-acc-v2";
448 saw2: power-manager@f90a9000 {
449 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
453 acc3: power-manager@f90b8000 {
454 compatible = "qcom,kpss-acc-v2";
458 saw3: power-manager@f90b9000 {
459 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
464 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
466 reg-names = "hc", "core";
469 interrupt-names = "hc_irq", "pwr_irq";
473 clock-names = "iface", "core", "xo";
474 bus-width = <8>;
475 non-removable;
481 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
483 reg-names = "hc", "core";
486 interrupt-names = "hc_irq", "pwr_irq";
490 clock-names = "iface", "core", "xo";
491 bus-width = <4>;
493 #address-cells = <1>;
494 #size-cells = <0>;
500 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
502 reg-names = "hc", "core";
505 interrupt-names = "hc_irq", "pwr_irq";
509 clock-names = "iface", "core", "xo";
510 bus-width = <4>;
512 #address-cells = <1>;
513 #size-cells = <0>;
519 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
523 clock-names = "core", "iface";
528 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
532 clock-names = "core", "iface";
533 pinctrl-names = "default";
534 pinctrl-0 = <&blsp1_uart2_default>;
540 compatible = "qcom,i2c-qup-v2.1.1";
544 clock-names = "core", "iface";
545 pinctrl-names = "default", "sleep";
546 pinctrl-0 = <&blsp1_i2c1_default>;
547 pinctrl-1 = <&blsp1_i2c1_sleep>;
548 #address-cells = <1>;
549 #size-cells = <0>;
554 compatible = "qcom,i2c-qup-v2.1.1";
558 clock-names = "core", "iface";
559 pinctrl-names = "default", "sleep";
560 pinctrl-0 = <&blsp1_i2c2_default>;
561 pinctrl-1 = <&blsp1_i2c2_sleep>;
562 #address-cells = <1>;
563 #size-cells = <0>;
568 compatible = "qcom,i2c-qup-v2.1.1";
572 clock-names = "core", "iface";
573 pinctrl-names = "default", "sleep";
574 pinctrl-0 = <&blsp1_i2c3_default>;
575 pinctrl-1 = <&blsp1_i2c3_sleep>;
576 #address-cells = <1>;
577 #size-cells = <0>;
582 compatible = "qcom,i2c-qup-v2.1.1";
586 clock-names = "core", "iface";
587 pinctrl-names = "default", "sleep";
588 pinctrl-0 = <&blsp1_i2c6_default>;
589 pinctrl-1 = <&blsp1_i2c6_sleep>;
590 #address-cells = <1>;
591 #size-cells = <0>;
594 blsp2_dma: dma-controller@f9944000 {
595 compatible = "qcom,bam-v1.4.0";
599 clock-names = "bam_clk";
600 #dma-cells = <1>;
605 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
609 clock-names = "core", "iface";
610 pinctrl-names = "default", "sleep";
611 pinctrl-0 = <&blsp2_uart1_default>;
612 pinctrl-1 = <&blsp2_uart1_sleep>;
617 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
621 clock-names = "core", "iface";
626 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
630 clock-names = "core", "iface";
631 pinctrl-names = "default";
632 pinctrl-0 = <&blsp2_uart4_default>;
638 compatible = "qcom,i2c-qup-v2.1.1";
642 clock-names = "core", "iface";
643 pinctrl-names = "default", "sleep";
644 pinctrl-0 = <&blsp2_i2c2_default>;
645 pinctrl-1 = <&blsp2_i2c2_sleep>;
646 #address-cells = <1>;
647 #size-cells = <0>;
652 compatible = "qcom,i2c-qup-v2.1.1";
656 clock-names = "core", "iface";
658 dma-names = "tx", "rx";
659 pinctrl-names = "default", "sleep";
660 pinctrl-0 = <&blsp2_i2c5_default>;
661 pinctrl-1 = <&blsp2_i2c5_sleep>;
662 #address-cells = <1>;
663 #size-cells = <0>;
668 compatible = "qcom,i2c-qup-v2.1.1";
672 clock-names = "core", "iface";
673 pinctrl-names = "default", "sleep";
674 pinctrl-0 = <&blsp2_i2c6_default>;
675 pinctrl-1 = <&blsp2_i2c6_sleep>;
676 #address-cells = <1>;
677 #size-cells = <0>;
681 compatible = "qcom,ci-hdrc";
687 clock-names = "iface", "core";
688 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
689 assigned-clock-rates = <75000000>;
691 reset-names = "core";
694 ahb-burst-config = <0>;
695 phy-names = "usb-phy";
697 #reset-cells = <1>;
700 usb_hs1_phy: phy-0 {
701 compatible = "qcom,usb-hs-phy-msm8974",
702 "qcom,usb-hs-phy";
703 #phy-cells = <0>;
705 clock-names = "ref", "sleep";
707 reset-names = "phy", "por";
711 usb_hs2_phy: phy-1 {
712 compatible = "qcom,usb-hs-phy-msm8974",
713 "qcom,usb-hs-phy";
714 #phy-cells = <0>;
716 clock-names = "ref", "sleep";
718 reset-names = "phy", "por";
728 clock-names = "core";
732 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
734 reg-names = "ccu", "dxe", "pmu";
736 memory-region = <&wcnss_region>;
738 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
743 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
745 qcom,smem-states = <&wcnss_smp2p_out 0>;
746 qcom,smem-state-names = "stop";
754 clock-names = "xo";
757 smd-edge {
761 qcom,smd-edge = <6>;
765 qcom,smd-channels = "WCNSS_CTRL";
771 compatible = "qcom,wcnss-bt";
775 compatible = "qcom,wcnss-wlan";
779 interrupt-names = "tx", "rx";
781 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
782 qcom,smem-state-names = "tx-enable",
783 "tx-rings-empty";
790 compatible = "qcom,msm8974-rpm-stats";
795 compatible = "arm,coresight-tmc", "arm,primecell";
799 clock-names = "apb_pclk", "atclk";
801 out-ports {
804 remote-endpoint = <&replicator_in>;
809 in-ports {
812 remote-endpoint = <&merger_out>;
819 compatible = "arm,coresight-tpiu", "arm,primecell";
823 clock-names = "apb_pclk", "atclk";
825 in-ports {
828 remote-endpoint = <&replicator_out1>;
835 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
839 clock-names = "apb_pclk", "atclk";
841 in-ports {
842 #address-cells = <1>;
843 #size-cells = <0>;
847 * 0 - not-connected
848 * 1 - connected trought funnel to Multimedia CPU
849 * 2 - connected to Wireless CPU
850 * 3 - not-connected
851 * 4 - not-connected
852 * 6 - not-connected
853 * 7 - connected to STM
858 remote-endpoint = <&kpss_out>;
863 out-ports {
866 remote-endpoint = <&merger_in1>;
873 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
877 clock-names = "apb_pclk", "atclk";
879 in-ports {
880 #address-cells = <1>;
881 #size-cells = <0>;
885 * 0 - connected trought funnel to Audio, Modem and
887 * 2...7 - not-connected
892 remote-endpoint = <&funnel1_out>;
897 out-ports {
900 remote-endpoint = <&etf_in>;
907 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
911 clock-names = "apb_pclk", "atclk";
913 out-ports {
914 #address-cells = <1>;
915 #size-cells = <0>;
920 remote-endpoint = <&etr_in>;
926 remote-endpoint = <&tpiu_in>;
931 in-ports {
934 remote-endpoint = <&etf_out>;
941 compatible = "arm,coresight-tmc", "arm,primecell";
945 clock-names = "apb_pclk", "atclk";
947 in-ports {
950 remote-endpoint = <&replicator_out0>;
957 compatible = "arm,coresight-etm4x", "arm,primecell";
961 clock-names = "apb_pclk", "atclk";
965 out-ports {
968 remote-endpoint = <&kpss_in0>;
975 compatible = "arm,coresight-etm4x", "arm,primecell";
979 clock-names = "apb_pclk", "atclk";
983 out-ports {
986 remote-endpoint = <&kpss_in1>;
993 compatible = "arm,coresight-etm4x", "arm,primecell";
997 clock-names = "apb_pclk", "atclk";
1001 out-ports {
1004 remote-endpoint = <&kpss_in2>;
1011 compatible = "arm,coresight-etm4x", "arm,primecell";
1015 clock-names = "apb_pclk", "atclk";
1019 out-ports {
1022 remote-endpoint = <&kpss_in3>;
1030 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1034 clock-names = "apb_pclk", "atclk";
1036 in-ports {
1037 #address-cells = <1>;
1038 #size-cells = <0>;
1043 remote-endpoint = <&etm0_out>;
1049 remote-endpoint = <&etm1_out>;
1055 remote-endpoint = <&etm2_out>;
1061 remote-endpoint = <&etm3_out>;
1066 out-ports {
1069 remote-endpoint = <&funnel1_in5>;
1077 compatible = "qcom,msm8974-bimc";
1078 #interconnect-cells = <1>;
1079 clock-names = "bus", "bus_a";
1084 gcc: clock-controller@fc400000 {
1085 compatible = "qcom,gcc-msm8974";
1086 #clock-cells = <1>;
1087 #reset-cells = <1>;
1088 #power-domain-cells = <1>;
1093 clock-names = "xo",
1098 compatible = "qcom,rpm-msg-ram";
1101 #address-cells = <1>;
1102 #size-cells = <1>;
1124 compatible = "qcom,msm8974-snoc";
1125 #interconnect-cells = <1>;
1126 clock-names = "bus", "bus_a";
1133 compatible = "qcom,msm8974-pnoc";
1134 #interconnect-cells = <1>;
1135 clock-names = "bus", "bus_a";
1142 compatible = "qcom,msm8974-ocmemnoc";
1143 #interconnect-cells = <1>;
1144 clock-names = "bus", "bus_a";
1151 compatible = "qcom,msm8974-mmssnoc";
1152 #interconnect-cells = <1>;
1153 clock-names = "bus", "bus_a";
1160 compatible = "qcom,msm8974-cnoc";
1161 #interconnect-cells = <1>;
1162 clock-names = "bus", "bus_a";
1167 tsens: thermal-sensor@fc4a9000 {
1168 compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1";
1171 nvmem-cells = <&tsens_mode>,
1198 nvmem-cell-names = "mode",
1227 interrupt-names = "uplow";
1228 #thermal-sensor-cells = <1>;
1237 compatible = "qcom,msm8974-qfprom", "qcom,qfprom";
1239 #address-cells = <1>;
1240 #size-cells = <1>;
1247 tsens_s0_p1: s0-p1@d1 {
1252 tsens_s1_p1: s1-p1@d2 {
1257 tsens_s2_p1: s2-p1@d2 {
1262 tsens_s3_p1: s3-p1@d3 {
1267 tsens_s4_p1: s4-p1@d4 {
1272 tsens_s5_p1: s5-p1@d4 {
1277 tsens_s6_p1: s6-p1@d5 {
1282 tsens_s7_p1: s7-p1@d6 {
1287 tsens_s8_p1: s8-p1@d7 {
1297 tsens_s9_p1: s9-p1@d8 {
1302 tsens_s10_p1: s10-p1@d8 {
1312 tsens_s0_p2: s0-p2@da {
1317 tsens_s1_p2: s1-p2@db {
1322 tsens_s2_p2: s2-p2@dc {
1327 tsens_s3_p2: s3-p2@dc {
1332 tsens_s4_p2: s4-p2@dd {
1337 tsens_s5_p2: s5-p2@de {
1342 tsens_s6_p2: s6-p2@df {
1347 tsens_s7_p2: s7-p2@e0 {
1352 tsens_s8_p2: s8-p2@e0 {
1357 tsens_s9_p2: s9-p2@e1 {
1362 tsens_s10_p2: s10-p2@e2 {
1367 tsens_s5_p2_backup: s5-p2-backup@e3 {
1372 tsens_mode_backup: mode-backup@e3 {
1377 tsens_s6_p2_backup: s6-p2-backup@e4 {
1382 tsens_s7_p2_backup: s7-p2-backup@e4 {
1387 tsens_s8_p2_backup: s8-p2-backup@e5 {
1392 tsens_s9_p2_backup: s9-p2-backup@e6 {
1397 tsens_s10_p2_backup: s10-p2-backup@e7 {
1402 tsens_base1_backup: base1-backup@440 {
1407 tsens_s0_p1_backup: s0-p1-backup@441 {
1412 tsens_s1_p1_backup: s1-p1-backup@442 {
1417 tsens_s2_p1_backup: s2-p1-backup@442 {
1422 tsens_s3_p1_backup: s3-p1-backup@443 {
1427 tsens_s4_p1_backup: s4-p1-backup@444 {
1432 tsens_s5_p1_backup: s5-p1-backup@444 {
1437 tsens_s6_p1_backup: s6-p1-backup@445 {
1442 tsens_s7_p1_backup: s7-p1-backup@446 {
1447 tsens_use_backup: use-backup@447 {
1452 tsens_s8_p1_backup: s8-p1-backup@448 {
1457 tsens_s9_p1_backup: s9-p1-backup@448 {
1462 tsens_s10_p1_backup: s10-p1-backup@449 {
1467 tsens_base2_backup: base2-backup@44a {
1472 tsens_s0_p2_backup: s0-p2-backup@44b {
1477 tsens_s1_p2_backup: s1-p2-backup@44c {
1482 tsens_s2_p2_backup: s2-p2-backup@44c {
1487 tsens_s3_p2_backup: s3-p2-backup@44d {
1492 tsens_s4_p2_backup: s4-p2-backup@44e {
1499 compatible = "qcom,spmi-pmic-arb";
1500 reg-names = "core", "intr", "cnfg";
1504 interrupt-names = "periph_irq";
1508 #address-cells = <2>;
1509 #size-cells = <0>;
1510 interrupt-controller;
1511 #interrupt-cells = <4>;
1514 bam_dmux_dma: dma-controller@fc834000 {
1515 compatible = "qcom,bam-v1.4.0";
1518 #dma-cells = <1>;
1521 num-channels = <6>;
1522 qcom,num-ees = <1>;
1523 qcom,powered-remotely;
1527 compatible = "qcom,msm8974-mss-pil";
1529 reg-names = "qdsp6", "rmb";
1531 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
1536 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
1542 clock-names = "iface", "bus", "mem", "xo";
1545 reset-names = "mss_restart";
1547 qcom,halt-regs = <&tcsr_mutex 0x1180 0x1200 0x1280>;
1549 qcom,smem-states = <&modem_smp2p_out 0>;
1550 qcom,smem-state-names = "stop";
1555 memory-region = <&mba_region>;
1559 memory-region = <&mpss_region>;
1562 bam_dmux: bam-dmux {
1563 compatible = "qcom,bam-dmux";
1565 interrupt-parent = <&modem_smsm>;
1567 interrupt-names = "pc", "pc-ack";
1569 qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
1570 qcom,smem-state-names = "pc", "pc-ack";
1573 dma-names = "tx", "rx";
1576 smd-edge {
1580 qcom,smd-edge = <0>;
1587 compatible = "qcom,msm8974-tcsr-mutex", "qcom,tcsr-mutex", "syscon";
1589 #hwlock-cells = <1>;
1593 compatible = "qcom,tcsr-msm8974", "syscon";
1598 compatible = "qcom,msm8974-pinctrl";
1600 gpio-controller;
1601 gpio-ranges = <&tlmm 0 0 146>;
1602 #gpio-cells = <2>;
1603 interrupt-controller;
1604 #interrupt-cells = <2>;
1607 sdc1_off: sdc1-off-state {
1608 clk-pins {
1610 bias-disable;
1611 drive-strength = <2>;
1614 cmd-pins {
1616 bias-pull-up;
1617 drive-strength = <2>;
1620 data-pins {
1622 bias-pull-up;
1623 drive-strength = <2>;
1627 sdc2_off: sdc2-off-state {
1628 clk-pins {
1630 bias-disable;
1631 drive-strength = <2>;
1634 cmd-pins {
1636 bias-pull-up;
1637 drive-strength = <2>;
1640 data-pins {
1642 bias-pull-up;
1643 drive-strength = <2>;
1647 blsp1_uart2_default: blsp1-uart2-default-state {
1648 rx-pins {
1651 drive-strength = <2>;
1652 bias-pull-up;
1655 tx-pins {
1658 drive-strength = <4>;
1659 bias-disable;
1663 blsp2_uart1_default: blsp2-uart1-default-state {
1664 tx-rts-pins {
1667 drive-strength = <2>;
1668 bias-disable;
1671 rx-cts-pins {
1674 drive-strength = <2>;
1675 bias-pull-up;
1679 blsp2_uart1_sleep: blsp2-uart1-sleep-state {
1682 drive-strength = <2>;
1683 bias-pull-down;
1686 blsp2_uart4_default: blsp2-uart4-default-state {
1687 tx-rts-pins {
1690 drive-strength = <2>;
1691 bias-disable;
1694 rx-cts-pins {
1697 drive-strength = <2>;
1698 bias-pull-up;
1702 blsp1_i2c1_default: blsp1-i2c1-default-state {
1705 drive-strength = <2>;
1706 bias-disable;
1709 blsp1_i2c1_sleep: blsp1-i2c1-sleep-state {
1712 drive-strength = <2>;
1713 bias-pull-up;
1716 blsp1_i2c2_default: blsp1-i2c2-default-state {
1719 drive-strength = <2>;
1720 bias-disable;
1723 blsp1_i2c2_sleep: blsp1-i2c2-sleep-state {
1726 drive-strength = <2>;
1727 bias-pull-up;
1730 blsp1_i2c3_default: blsp1-i2c3-default-state {
1733 drive-strength = <2>;
1734 bias-disable;
1737 blsp1_i2c3_sleep: blsp1-i2c3-sleep-state {
1740 drive-strength = <2>;
1741 bias-pull-up;
1748 blsp1_i2c6_default: blsp1-i2c6-default-state {
1751 drive-strength = <2>;
1752 bias-disable;
1755 blsp1_i2c6_sleep: blsp1-i2c6-sleep-state {
1758 drive-strength = <2>;
1759 bias-pull-up;
1765 blsp2_i2c2_default: blsp2-i2c2-default-state {
1768 drive-strength = <2>;
1769 bias-disable;
1772 blsp2_i2c2_sleep: blsp2-i2c2-sleep-state {
1775 drive-strength = <2>;
1776 bias-pull-up;
1783 blsp2_i2c5_default: blsp2-i2c5-default-state {
1786 drive-strength = <2>;
1787 bias-disable;
1790 blsp2_i2c5_sleep: blsp2-i2c5-sleep-state {
1793 drive-strength = <2>;
1794 bias-pull-up;
1797 blsp2_i2c6_default: blsp2-i2c6-default-state {
1800 drive-strength = <2>;
1801 bias-disable;
1804 blsp2_i2c6_sleep: blsp2-i2c6-sleep-state {
1807 drive-strength = <2>;
1808 bias-pull-up;
1811 cci_default: cci-default-state {
1812 cci_i2c0_default: cci-i2c0-default-pins {
1813 pins = "gpio19", "gpio20";
1815 drive-strength = <2>;
1816 bias-disable;
1819 cci_i2c1_default: cci-i2c1-default-pins {
1822 drive-strength = <2>;
1823 bias-disable;
1827 cci_sleep: cci-sleep-state {
1828 cci_i2c0_sleep: cci-i2c0-sleep-pins {
1829 pins = "gpio19", "gpio20";
1831 drive-strength = <2>;
1832 bias-disable;
1835 cci_i2c1_sleep: cci-i2c1-sleep-pins {
1838 drive-strength = <2>;
1839 bias-disable;
1843 spi8_default: spi8_default-state {
1844 mosi-pins {
1848 miso-pins {
1852 cs-pins {
1856 clk-pins {
1863 mmcc: clock-controller@fd8c0000 {
1864 compatible = "qcom,mmcc-msm8974";
1865 #clock-cells = <1>;
1866 #reset-cells = <1>;
1867 #power-domain-cells = <1>;
1881 clock-names = "xo",
1895 mdss: display-subsystem@fd900000 {
1898 reg-names = "mdss_phys", "vbif_phys";
1900 power-domains = <&mmcc MDSS_GDSC>;
1905 clock-names = "iface", "bus", "vsync";
1909 interrupt-controller;
1910 #interrupt-cells = <1>;
1914 #address-cells = <1>;
1915 #size-cells = <1>;
1918 mdp: display-controller@fd900000 {
1919 compatible = "qcom,msm8974-mdp5", "qcom,mdp5";
1921 reg-names = "mdp_phys";
1923 interrupt-parent = <&mdss>;
1930 clock-names = "iface", "bus", "core", "vsync";
1933 interconnect-names = "mdp0-mem";
1936 #address-cells = <1>;
1937 #size-cells = <0>;
1942 remote-endpoint = <&mdss_dsi0_in>;
1949 remote-endpoint = <&mdss_dsi1_in>;
1956 compatible = "qcom,msm8974-dsi-ctrl",
1957 "qcom,mdss-dsi-ctrl";
1959 reg-names = "dsi_ctrl";
1961 interrupt-parent = <&mdss>;
1964 assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
1965 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
1974 clock-names = "mdp_core",
1986 #address-cells = <1>;
1987 #size-cells = <0>;
1990 #address-cells = <1>;
1991 #size-cells = <0>;
1996 remote-endpoint = <&mdp5_intf1_out>;
2009 compatible = "qcom,dsi-phy-28nm-hpm";
2013 reg-names = "dsi_pll",
2017 #clock-cells = <1>;
2018 #phy-cells = <0>;
2021 clock-names = "iface", "ref";
2027 compatible = "qcom,msm8974-dsi-ctrl",
2028 "qcom,mdss-dsi-ctrl";
2030 reg-names = "dsi_ctrl";
2032 interrupt-parent = <&mdss>;
2035 assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
2036 assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
2045 clock-names = "mdp_core",
2057 #address-cells = <1>;
2058 #size-cells = <0>;
2061 #address-cells = <1>;
2062 #size-cells = <0>;
2067 remote-endpoint = <&mdp5_intf2_out>;
2080 compatible = "qcom,dsi-phy-28nm-hpm";
2084 reg-names = "dsi_pll",
2088 #clock-cells = <1>;
2089 #phy-cells = <0>;
2092 clock-names = "iface", "ref";
2099 compatible = "qcom,msm8974-cci";
2100 #address-cells = <1>;
2101 #size-cells = <0>;
2107 clock-names = "camss_top_ahb",
2111 pinctrl-names = "default", "sleep";
2112 pinctrl-0 = <&cci_default>;
2113 pinctrl-1 = <&cci_sleep>;
2117 cci_i2c0: i2c-bus@0 {
2119 clock-frequency = <100000>;
2120 #address-cells = <1>;
2121 #size-cells = <0>;
2124 cci_i2c1: i2c-bus@1 {
2126 clock-frequency = <100000>;
2127 #address-cells = <1>;
2128 #size-cells = <0>;
2133 compatible = "qcom,adreno-330.1", "qcom,adreno";
2135 reg-names = "kgsl_3d0_reg_memory";
2138 interrupt-names = "kgsl_3d0_irq";
2143 clock-names = "core", "iface", "mem_iface";
2146 power-domains = <&mmcc OXILICX_GDSC>;
2147 operating-points-v2 = <&gpu_opp_table>;
2151 interconnect-names = "gfx-mem", "ocmem";
2157 gpu_opp_table: opp-table {
2158 compatible = "operating-points-v2";
2160 opp-320000000 {
2161 opp-hz = /bits/ 64 <320000000>;
2164 opp-200000000 {
2165 opp-hz = /bits/ 64 <200000000>;
2168 opp-27000000 {
2169 opp-hz = /bits/ 64 <27000000>;
2175 compatible = "qcom,msm8974-ocmem";
2178 reg-names = "ctrl", "mem";
2182 clock-names = "core", "iface";
2184 #address-cells = <1>;
2185 #size-cells = <1>;
2187 gmu_sram: gmu-sram@0 {
2193 compatible = "qcom,msm8974-adsp-pil";
2196 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
2201 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
2204 clock-names = "xo";
2206 memory-region = <&adsp_region>;
2208 qcom,smem-states = <&adsp_smp2p_out 0>;
2209 qcom,smem-state-names = "stop";
2213 smd-edge {
2217 qcom,smd-edge = <1>;
2223 compatible = "qcom,msm8974-imem", "syscon", "simple-mfd";
2226 reboot-mode {
2227 compatible = "syscon-reboot-mode";
2233 thermal-zones {
2234 cpu0-thermal {
2235 polling-delay-passive = <250>;
2236 polling-delay = <1000>;
2238 thermal-sensors = <&tsens 5>;
2254 cpu1-thermal {
2255 polling-delay-passive = <250>;
2256 polling-delay = <1000>;
2258 thermal-sensors = <&tsens 6>;
2274 cpu2-thermal {
2275 polling-delay-passive = <250>;
2276 polling-delay = <1000>;
2278 thermal-sensors = <&tsens 7>;
2294 cpu3-thermal {
2295 polling-delay-passive = <250>;
2296 polling-delay = <1000>;
2298 thermal-sensors = <&tsens 8>;
2314 q6-dsp-thermal {
2315 polling-delay-passive = <250>;
2316 polling-delay = <1000>;
2318 thermal-sensors = <&tsens 1>;
2321 q6_dsp_alert0: trip-point0 {
2329 modemtx-thermal {
2330 polling-delay-passive = <250>;
2331 polling-delay = <1000>;
2333 thermal-sensors = <&tsens 2>;
2336 modemtx_alert0: trip-point0 {
2344 video-thermal {
2345 polling-delay-passive = <250>;
2346 polling-delay = <1000>;
2348 thermal-sensors = <&tsens 3>;
2351 video_alert0: trip-point0 {
2359 wlan-thermal {
2360 polling-delay-passive = <250>;
2361 polling-delay = <1000>;
2363 thermal-sensors = <&tsens 4>;
2366 wlan_alert0: trip-point0 {
2374 gpu-top-thermal {
2375 polling-delay-passive = <250>;
2376 polling-delay = <1000>;
2378 thermal-sensors = <&tsens 9>;
2381 gpu1_alert0: trip-point0 {
2389 gpu-bottom-thermal {
2390 polling-delay-passive = <250>;
2391 polling-delay = <1000>;
2393 thermal-sensors = <&tsens 10>;
2396 gpu2_alert0: trip-point0 {
2406 compatible = "arm,armv7-timer";
2411 clock-frequency = <19200000>;