Lines Matching +full:0 +full:x442
23 #clock-cells = <0>;
29 #clock-cells = <0>;
36 #size-cells = <0>;
39 cpu0: cpu@0 {
43 reg = <0>;
109 memory@0 {
111 reg = <0x0 0x0>;
136 mboxes = <&apcs 0>;
159 reg = <0x08000000 0x5100000>;
164 reg = <0x0d100000 0x100000>;
169 reg = <0x0d200000 0xa00000>;
174 reg = <0x0dc00000 0x1900000>;
179 reg = <0x0f500000 0x500000>;
184 reg = <0xfa00000 0x200000>;
189 reg = <0x0fc00000 0x160000>;
194 reg = <0x0fd60000 0x20000>;
200 reg = <0x0fd80000 0x180000>;
225 qcom,local-pid = <0>;
250 qcom,local-pid = <0>;
275 qcom,local-pid = <0>;
296 #size-cells = <0>;
298 mboxes = <0>, <&apcs 13>, <&apcs 9>, <&apcs 19>;
300 apps_smsm: apps@0 {
301 reg = <0>;
341 reg = <0xf9000000 0x1000>,
342 <0xf9002000 0x1000>;
348 reg = <0xf9011000 0x1000>;
354 reg = <0xf9012000 0x1000>;
359 reg = <0xf9017000 0x1000>;
370 reg = <0xf9020000 0x1000>;
374 frame-number = <0>;
377 reg = <0xf9021000 0x1000>,
378 <0xf9022000 0x1000>;
384 reg = <0xf9023000 0x1000>;
391 reg = <0xf9024000 0x1000>;
398 reg = <0xf9025000 0x1000>;
405 reg = <0xf9026000 0x1000>;
412 reg = <0xf9027000 0x1000>;
419 reg = <0xf9028000 0x1000>;
426 reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
431 reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
436 reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
441 reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
446 reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
451 reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
456 reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
461 reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
466 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
483 reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
495 #size-cells = <0>;
502 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
514 #size-cells = <0>;
521 reg = <0xf991d000 0x1000>;
530 reg = <0xf991e000 0x1000>;
535 pinctrl-0 = <&blsp1_uart2_default>;
542 reg = <0xf9923000 0x1000>;
547 pinctrl-0 = <&blsp1_i2c1_default>;
550 #size-cells = <0>;
556 reg = <0xf9924000 0x1000>;
561 pinctrl-0 = <&blsp1_i2c2_default>;
564 #size-cells = <0>;
570 reg = <0xf9925000 0x1000>;
575 pinctrl-0 = <&blsp1_i2c3_default>;
578 #size-cells = <0>;
584 reg = <0xf9928000 0x1000>;
589 pinctrl-0 = <&blsp1_i2c6_default>;
592 #size-cells = <0>;
597 reg = <0xf9944000 0x19000>;
602 qcom,ee = <0>;
607 reg = <0xf995d000 0x1000>;
612 pinctrl-0 = <&blsp2_uart1_default>;
619 reg = <0xf995e000 0x1000>;
628 reg = <0xf9960000 0x1000>;
633 pinctrl-0 = <&blsp2_uart4_default>;
640 reg = <0xf9964000 0x1000>;
645 pinctrl-0 = <&blsp2_i2c2_default>;
648 #size-cells = <0>;
654 reg = <0xf9967000 0x1000>;
661 pinctrl-0 = <&blsp2_i2c5_default>;
664 #size-cells = <0>;
670 reg = <0xf9968000 0x1000>;
675 pinctrl-0 = <&blsp2_i2c6_default>;
678 #size-cells = <0>;
683 reg = <0xf9a55000 0x200>,
684 <0xf9a55200 0x200>;
695 ahb-burst-config = <0>;
701 usb_hs1_phy: phy-0 {
704 #phy-cells = <0>;
707 resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
715 #phy-cells = <0>;
727 reg = <0xf9bff000 0x200>;
734 reg = <0xfb204000 0x2000>, <0xfb202000 0x1000>, <0xfb21b000 0x3000>;
740 <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
746 qcom,smem-states = <&wcnss_smp2p_out 0>;
792 reg = <0xfc190000 0x10000>;
797 reg = <0xfc307000 0x1000>;
821 reg = <0xfc318000 0x1000>;
837 reg = <0xfc31a000 0x1000>;
844 #size-cells = <0>;
848 * 0 - not-connected
875 reg = <0xfc31b000 0x1000>;
882 #size-cells = <0>;
886 * 0 - connected trought funnel to Audio, Modem and
909 reg = <0xfc31c000 0x1000>;
916 #size-cells = <0>;
918 port@0 {
919 reg = <0>;
943 reg = <0xfc322000 0x1000>;
959 reg = <0xfc33c000 0x1000>;
977 reg = <0xfc33d000 0x1000>;
995 reg = <0xfc33e000 0x1000>;
1013 reg = <0xfc33f000 0x1000>;
1032 reg = <0xfc345000 0x1000>;
1039 #size-cells = <0>;
1041 port@0 {
1042 reg = <0>;
1077 reg = <0xfc380000 0x6a000>;
1090 reg = <0xfc400000 0x4000>;
1100 reg = <0xfc428000 0x4000>;
1104 ranges = <0 0xfc428000 0x4000>;
1107 reg = <0x150 0x14>;
1111 reg = <0xb50 0x14>;
1115 reg = <0x1550 0x14>;
1119 reg = <0x1f50 0x14>;
1124 reg = <0xfc460000 0x4000>;
1133 reg = <0xfc468000 0x4000>;
1142 reg = <0xfc470000 0x4000>;
1151 reg = <0xfc478000 0x4000>;
1160 reg = <0xfc480000 0x4000>;
1170 reg = <0xfc4a9000 0x1000>, /* TM */
1171 <0xfc4a8000 0x1000>; /* SROT */
1234 reg = <0xfc4ab000 0x4>;
1239 reg = <0xfc4bc000 0x2100>;
1244 reg = <0xd0 0x1>;
1245 bits = <0 8>;
1249 reg = <0xd1 0x1>;
1250 bits = <0 6>;
1254 reg = <0xd1 0x2>;
1259 reg = <0xd2 0x2>;
1264 reg = <0xd3 0x1>;
1269 reg = <0xd4 0x1>;
1270 bits = <0 6>;
1274 reg = <0xd4 0x2>;
1279 reg = <0xd5 0x2>;
1284 reg = <0xd6 0x1>;
1289 reg = <0xd7 0x1>;
1290 bits = <0 6>;
1294 reg = <0xd7 0x1>;
1299 reg = <0xd8 0x1>;
1300 bits = <0 6>;
1304 reg = <0xd8 0x2>;
1309 reg = <0xd9 0x2>;
1314 reg = <0xda 0x2>;
1319 reg = <0xdb 0x1>;
1324 reg = <0xdc 0x1>;
1325 bits = <0 6>;
1329 reg = <0xdc 0x2>;
1334 reg = <0xdd 0x2>;
1339 reg = <0xde 0x2>;
1344 reg = <0xdf 0x1>;
1345 bits = <0 6>;
1349 reg = <0xe0 0x1>;
1350 bits = <0 6>;
1354 reg = <0xe0 0x2>;
1359 reg = <0xe1 0x2>;
1364 reg = <0xe2 0x2>;
1369 reg = <0xe3 0x2>;
1370 bits = <0 6>;
1374 reg = <0xe3 0x1>;
1379 reg = <0xe4 0x1>;
1380 bits = <0 6>;
1384 reg = <0xe4 0x2>;
1389 reg = <0xe5 0x2>;
1394 reg = <0xe6 0x2>;
1399 reg = <0xe7 0x1>;
1400 bits = <0 6>;
1404 reg = <0x440 0x1>;
1405 bits = <0 8>;
1409 reg = <0x441 0x1>;
1410 bits = <0 6>;
1414 reg = <0x441 0x2>;
1419 reg = <0x442 0x2>;
1424 reg = <0x443 0x1>;
1429 reg = <0x444 0x1>;
1430 bits = <0 6>;
1434 reg = <0x444 0x2>;
1439 reg = <0x445 0x2>;
1444 reg = <0x446 0x1>;
1449 reg = <0x447 0x1>;
1454 reg = <0x448 0x1>;
1455 bits = <0 6>;
1459 reg = <0x448 0x2>;
1464 reg = <0x449 0x2>;
1469 reg = <0x44a 0x2>;
1474 reg = <0x44b 0x3>;
1479 reg = <0x44c 0x1>;
1480 bits = <0 6>;
1484 reg = <0x44c 0x2>;
1489 reg = <0x44d 0x2>;
1494 reg = <0x44e 0x1>;
1502 reg = <0xfc4cf000 0x1000>,
1503 <0xfc4cb000 0x1000>,
1504 <0xfc4ca000 0x1000>;
1507 qcom,ee = <0>;
1508 qcom,channel = <0>;
1510 #size-cells = <0>;
1517 reg = <0xfc834000 0x7000>;
1520 qcom,ee = <0>;
1529 reg = <0xfc880000 0x100>, <0xfc820000 0x020>;
1533 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
1548 qcom,halt-regs = <&tcsr_mutex 0x1180 0x1200 0x1280>;
1550 qcom,smem-states = <&modem_smp2p_out 0>;
1581 qcom,smd-edge = <0>;
1589 reg = <0xfd484000 0x2000>;
1595 reg = <0xfd4a0000 0x10000>;
1600 reg = <0xfd510000 0x4000>;
1602 gpio-ranges = <&tlmm 0 0 146>;
1869 reg = <0xfd8c0000 0x6000>;
1879 <0>,
1880 <0>,
1881 <0>;
1898 reg = <0xfd900000 0x100>, <0xfd924000 0x1000>;
1921 reg = <0xfd900100 0x22000>;
1925 interrupts = <0>;
1938 #size-cells = <0>;
1940 port@0 {
1941 reg = <0>;
1959 reg = <0xfd922800 0x1f8>;
1990 #size-cells = <0>;
1994 #size-cells = <0>;
1996 port@0 {
1997 reg = <0>;
2013 reg = <0xfd922a00 0xd4>,
2014 <0xfd922b00 0x280>,
2015 <0xfd922d80 0x30>;
2021 #phy-cells = <0>;
2032 reg = <0xfd922e00 0x1f8>;
2063 #size-cells = <0>;
2067 #size-cells = <0>;
2069 port@0 {
2070 reg = <0>;
2086 reg = <0xfd923000 0xd4>,
2087 <0xfd923100 0x280>,
2088 <0xfd923380 0x30>;
2094 #phy-cells = <0>;
2106 #size-cells = <0>;
2107 reg = <0xfda0c000 0x1000>;
2117 pinctrl-0 = <&cci_default>;
2122 cci_i2c0: i2c-bus@0 {
2123 reg = <0>;
2126 #size-cells = <0>;
2133 #size-cells = <0>;
2139 reg = <0xfdb00000 0x10000>;
2158 // iommus = <&gpu_iommu 0>;
2181 reg = <0xfdd00000 0x2000>,
2182 <0xfec00000 0x180000>;
2184 ranges = <0 0xfec00000 0x180000>;
2192 gmu_sram: gmu-sram@0 {
2193 reg = <0x0 0x100000>;
2199 reg = <0xfe200000 0x100>;
2202 <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
2213 qcom,smem-states = <&adsp_smp2p_out 0>;
2229 reg = <0xfe805000 0x1000>;
2233 offset = <0x65c>;