Lines Matching +full:qup +full:- +full:config
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
8 #include <dt-bindings/mfd/qcom-rpm.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 interrupt-parent = <&intc>;
19 #address-cells = <1>;
20 #size-cells = <0>;
25 enable-method = "qcom,kpss-acc-v1";
28 next-level-cache = <&L2>;
35 enable-method = "qcom,kpss-acc-v1";
38 next-level-cache = <&L2>;
43 L2: l2-cache {
45 cache-level = <2>;
46 cache-unified;
55 cpu-pmu {
56 compatible = "qcom,krait-pmu";
58 qcom,no-pc-write;
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 clock-frequency = <19200000>;
66 clock-output-names = "cxo_board";
70 compatible = "fixed-clock";
71 #clock-cells = <0>;
72 clock-frequency = <27000000>;
73 clock-output-names = "pxo_board";
77 compatible = "fixed-clock";
78 #clock-cells = <0>;
79 clock-frequency = <32768>;
80 clock-output-names = "sleep_clk";
85 vsdcc_fixed: vsdcc-regulator {
86 compatible = "regulator-fixed";
87 regulator-name = "SDCC Power";
88 regulator-min-microvolt = <2700000>;
89 regulator-max-microvolt = <2700000>;
90 regulator-always-on;
94 #address-cells = <1>;
95 #size-cells = <1>;
97 compatible = "simple-bus";
99 intc: interrupt-controller@2000000 {
100 compatible = "qcom,msm-qgic2";
101 interrupt-controller;
102 #interrupt-cells = <3>;
108 compatible = "qcom,kpss-wdt-msm8960", "qcom,kpss-timer",
109 "qcom,msm-timer";
114 clock-frequency = <27000000>;
115 cpu-offset = <0x80000>;
119 compatible = "qcom,msm8960-pinctrl";
120 gpio-controller;
121 gpio-ranges = <&msmgpio 0 0 152>;
122 #gpio-cells = <2>;
124 interrupt-controller;
125 #interrupt-cells = <2>;
129 gcc: clock-controller@900000 {
130 compatible = "qcom,gcc-msm8960";
131 #clock-cells = <1>;
132 #reset-cells = <1>;
137 clock-names = "cxo", "pxo", "pll4";
140 lcc: clock-controller@28000000 {
141 compatible = "qcom,lcc-msm8960";
143 #clock-cells = <1>;
144 #reset-cells = <1>;
151 clock-names = "pxo",
161 clock-controller@4000000 {
162 compatible = "qcom,mmcc-msm8960";
164 #clock-cells = <1>;
165 #power-domain-cells = <1>;
166 #reset-cells = <1>;
175 clock-names = "pxo",
185 l2cc: clock-controller@2011000 {
186 compatible = "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc", "syscon";
189 clock-names = "pll8_vote", "pxo";
190 #clock-cells = <0>;
194 compatible = "qcom,rpm-msm8960";
201 interrupt-names = "ack", "err", "wakeup";
204 acc0: clock-controller@2088000 {
205 compatible = "qcom,kpss-acc-v1";
208 clock-names = "pll8_vote", "pxo";
209 clock-output-names = "acpu0_aux";
210 #clock-cells = <0>;
213 acc1: clock-controller@2098000 {
214 compatible = "qcom,kpss-acc-v1";
217 clock-names = "pll8_vote", "pxo";
218 clock-output-names = "acpu1_aux";
219 #clock-cells = <0>;
222 saw0: power-manager@2089000 {
223 compatible = "qcom,msm8960-saw2-cpu", "qcom,saw2";
227 regulator-min-microvolt = <850000>;
228 regulator-max-microvolt = <1300000>;
232 saw1: power-manager@2099000 {
233 compatible = "qcom,msm8960-saw2-cpu", "qcom,saw2";
237 regulator-min-microvolt = <850000>;
238 regulator-max-microvolt = <1300000>;
243 compatible = "qcom,gsbi-v1.0.0";
244 cell-index = <5>;
247 clock-names = "iface";
248 #address-cells = <1>;
249 #size-cells = <1>;
252 syscon-tcsr = <&tcsr>;
255 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
260 clock-names = "core", "iface";
268 qcom,controller-type = "pmic-arbiter";
275 clock-names = "core";
280 arm,primecell-periphid = <0x00051180>;
285 clock-names = "mclk", "apb_pclk";
286 bus-width = <4>;
287 cap-sd-highspeed;
288 cap-mmc-highspeed;
289 max-frequency = <192000000>;
290 no-1-8-v;
291 vmmc-supply = <&vsdcc_fixed>;
297 arm,primecell-periphid = <0x00051180>;
301 clock-names = "mclk", "apb_pclk";
302 bus-width = <8>;
303 max-frequency = <96000000>;
304 non-removable;
305 cap-sd-highspeed;
306 cap-mmc-highspeed;
307 vmmc-supply = <&vsdcc_fixed>;
311 compatible = "qcom,tcsr-msm8960", "syscon";
316 compatible = "qcom,gsbi-v1.0.0";
317 cell-index = <1>;
320 clock-names = "iface";
321 #address-cells = <1>;
322 #size-cells = <1>;
326 compatible = "qcom,spi-qup-v1.1.1";
327 #address-cells = <1>;
328 #size-cells = <0>;
331 cs-gpios = <&msmgpio 8 0>;
334 clock-names = "core", "iface";
340 compatible = "qcom,ci-hdrc";
345 clock-names = "core", "iface";
346 assigned-clocks = <&gcc USB_HS1_XCVR_CLK>;
347 assigned-clock-rates = <60000000>;
349 reset-names = "core";
351 ahb-burst-config = <0>;
353 phy-names = "usb-phy";
354 #reset-cells = <1>;
359 compatible = "qcom,usb-hs-phy-msm8960",
360 "qcom,usb-hs-phy";
362 clock-names = "sleep", "ref";
364 reset-names = "por";
365 #phy-cells = <0>;
371 compatible = "qcom,gsbi-v1.0.0";
374 cell-index = <3>;
376 clock-names = "iface";
377 #address-cells = <1>;
378 #size-cells = <1>;
382 compatible = "qcom,i2c-qup-v1.1.1";
384 pinctrl-0 = <&i2c3_default_state>;
385 pinctrl-1 = <&i2c3_sleep_state>;
386 pinctrl-names = "default", "sleep";
390 clock-names = "core", "iface";
391 #address-cells = <1>;
392 #size-cells = <0>;
398 #include "qcom-msm8960-pins.dtsi"